Ruchika Gupta 668ec87f52 powerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ram ... For E6500 cores, L2 cache has been used as init_ram. L1 cache is a write through cache on E6500.If lines are not locked in both L1 and L2 caches, crashes are observed during secure boot. This patch locks/ unlocks both L1 and L2 cache to prevent the crash. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>		2017-04-17 09:03:30 -07:00
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mpc5xx	board_f: powerpc: Use timer_init() instead of init_timebase()	2017-04-05 13:54:29 -04:00
mpc5xxx	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
mpc8xx	board_f: Remove adjust_sdram_tbs_8xx() from the init sequence	2017-04-05 13:52:52 -04:00
mpc8xxx	powerpc: Drop probecpu() in favour of arch_cpu_init()	2017-01-25 17:38:41 -05:00
mpc83xx	board_f: powerpc: Move prt_83xx_rsr() to private code	2017-04-05 13:55:06 -04:00
mpc85xx	powerpc: e6500: Lock/unlock 1 cache instead of L1 as init_ram	2017-04-17 09:03:30 -07:00
mpc86xx	arch: powerpc: update the eLBC IP input clock	2017-02-03 14:31:45 -08:00
mpc512x	powerpc: mpc512x: Add support for get_svr() for mpc512x devices	2016-11-21 09:20:32 -08:00
mpc8260	board_f: powerpc: Make prt_8260_rsr(), prt_8260_clks() private	2017-04-05 13:55:08 -04:00
ppc4xx	board_f: Rename initdram() to dram_init()	2017-04-13 09:40:57 -04:00
Makefile	Various Makefiles: Add SPDX-License-Identifier tags	2015-11-10 09:19:52 -05:00