u-boot-brain/arch/riscv/cpu
Bin Meng 44fe795c14 riscv: ax25: Hide the ax25-specific Kconfig option
There is no need to expose RISCV_NDS to the Kconfig menu as it is
an ax25-specific option. Introduce a dedicated Kconfig option for
the cache ops of ax25 platform and use that to guard the cache ops.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-12-18 09:56:26 +08:00
..
ax25 riscv: ax25: Hide the ax25-specific Kconfig option 2018-12-18 09:56:26 +08:00
qemu riscv: qemu: Create a simple-bus driver for the soc node 2018-12-18 09:56:26 +08:00
cpu.c riscv: save hart ID and device tree passed by prior boot stage 2018-11-26 13:57:32 +08:00
Makefile riscv: Make start.S available for all targets 2018-10-03 17:48:14 +08:00
start.S riscv: ax25-ae350: Pass dtb address to u-boot with a1 register 2018-12-05 14:14:16 +08:00
u-boot.lds riscv: Make start.S available for all targets 2018-10-03 17:48:14 +08:00