u-boot-brain/arch/arm/cpu/armv8/fsl-layerscape
Meenakshi Aggarwal 1dff14c87d armv8/fsl-layerscape: Add loop to check L3 dcache status
Flushing L3 cache may need variable time depending upon cache line
allocation.

Coming up with a proper timeout value would be best handled by
simulations under multiple scenarios in your actual system.
>From the purely HN-F point of view, the flush would take ~15 cycles for
a clean line, and ~22 cycles for a dirty line.  For the dirty line case,
there are many variables outside the HN-F that will increase the
duration per line.  For example, a *DBIDResp from the SN-F/SBSX,
memory controller latency, SN-F/SBSX RetryAck responses, CCN ring
congestion, CCN ring hops, etc, etc.  The worst-case timeout would
have to factor in all of these variables plus the HN-F cycles for
every line in the L3, and assuming all lines are dirty

In case if L3 is not flushed properly, system behaviour will be
erratic, so remove timeout and add loop to check status of L3 cache.

System will stuck in while loop if there is some issue in L3 cache
flushing.

Signed-off-by: Udit Kumar <udit.kumar@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-06-19 12:54:57 +05:30
..
doc armv8: ls1028a: Add NXP LS1028A SoC support 2019-05-22 12:24:24 +05:30
cpu.c armv8: fsl-layerscape: Set env_loc to ENVL_NOWHERE with CONFIG_ENV_IS_NOWHERE. 2019-05-22 12:24:24 +05:30
cpu.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
fdt.c armv8: ls1043a: correct the PCIe INTx fixup 2019-01-17 13:16:44 -08:00
fsl_lsch2_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
fsl_lsch2_speed.c armv8/fsl-lsch2: correct QMAN clock 2018-05-09 09:17:51 -05:00
fsl_lsch3_serdes.c armv8, lx2160a: Initialize ethernet array in serdes_init 2019-02-19 10:26:43 +05:30
fsl_lsch3_speed.c armv8: fsl-lsch3: add clock support for the second eSDHC 2019-06-19 12:54:56 +05:30
icid.c armv8: ls1046a: setup fman ports ICIDs and device tree 2018-08-10 10:35:42 -07:00
Kconfig armv8: ls1028a: enable workaround for USB erratum A-008997 2019-06-19 12:54:56 +05:30
lowlevel.S armv8/fsl-layerscape: Add loop to check L3 dcache status 2019-06-19 12:54:57 +05:30
ls1012a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1028a_serdes.c armv8: ls1028a: Add other serdes protocal support 2019-06-19 12:54:56 +05:30
ls1043_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1043a_psci.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1043a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1046_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1046a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1088a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls2080a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
lx2160a_serdes.c armv8: lx2160a: Add LX2160A SoC Support 2018-12-06 14:37:19 -08:00
Makefile armv8: ls1028a: Add NXP LS1028A SoC support 2019-05-22 12:24:24 +05:30
mp.c common: Fix cpu nr type which is always unsigned type 2018-06-19 07:31:45 -04:00
ppa.c ppa/fm/qe: use block layer in ppa/fm/qe driver 2018-09-27 08:48:51 -07:00
soc.c armv8: ls1028a: enable workaround for USB errarum A-009007 2019-06-19 12:54:56 +05:30
spl.c armv8: ls1046ardb: Add falcon mode for for QSPI boot 2018-07-26 11:51:23 -07:00