Bin Meng 1b3c8d6402 riscv: Introduce a new config for SBI v0.1 ... We now have SBI v0.2 which is more scalable and extendable to handle future needs for RISC-V supervisor interfaces. Introduce a new config and move all SBI v0.1 code under that config. This allows to implement the new replacement SBI extensions cleanly and remove v0.1 extensions easily in future. Currently, the config is enabled by default. Once all M-mode software, with v0.1, is no longer in use, this config option and all relevant code can be easily removed. This commit is inspired from Linux kernel patch: https://patchwork.kernel.org/patch/11407361/ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>		2020-03-17 11:29:54 +08:00
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arch-generic	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
asm.h	riscv: Sync csr.h with Linux kernel v5.2	2019-08-15 13:42:28 +08:00
barrier.h	riscv: make use of the barrier functions from Linux	2018-11-26 13:57:30 +08:00
bitops.h	riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()	2018-05-15 21:44:05 -04:00
byteorder.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
cache.h	riscv: cache: Implement i/dcache [status, enable, disable]	2018-11-26 13:58:01 +08:00
config.h	riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd	2019-02-27 09:12:34 +08:00
csr.h	riscv: Access CSRs using CSR numbers	2019-08-15 13:42:28 +08:00
dma-mapping.h	dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>	2020-02-19 21:27:30 +08:00
encoding.h	riscv: add run mode configuration for SPL	2019-08-26 16:07:42 +08:00
global_data.h	riscv: Introduce CONFIG_XIP to support booting from flash	2019-05-09 16:46:46 +08:00
gpio.h	gpio: sifive: add support for DM based gpio driver for FU540-SoC	2019-10-18 09:04:01 +08:00
io.h	riscv: do not reimplement generic io functions	2018-11-26 13:57:30 +08:00
linkage.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
posix_types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
processor.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00
ptrace.h	riscv: checkpatch: Fix alignment should match open parenthesis	2018-03-30 13:13:22 +08:00
sbi.h	riscv: Introduce a new config for SBI v0.1	2020-03-17 11:29:54 +08:00
sections.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
setjmp.h	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
smp.h	riscv: add option to wait for ack from secondary harts in smp functions	2019-12-10 08:23:10 +08:00
spl.h	riscv: add SPL support	2019-08-26 16:07:42 +08:00
string.h	riscv: checkpatch: Fix Macro argument reuse	2018-03-30 13:13:22 +08:00
syscon.h	riscv: Add a SYSCON driver for Andestech's PLMT	2019-04-08 09:45:08 +08:00
system.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
types.h	riscv: fix use of incorrectly sized variables	2018-11-26 13:57:29 +08:00
u-boot-riscv.h	riscv: Add board_quiesce_devices stub	2018-05-29 14:43:12 +08:00
u-boot.h	env: Drop environment.h header file where not needed	2019-08-11 16:43:41 -04:00
unaligned.h	riscv: nx25: include: Add header files to support RISC-V	2018-01-12 08:05:12 -05:00