brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-07-09 12:46:17 +09:00
Code Issues Projects Releases Wiki Activity
13f7988067
u-boot-brain/arch/arm/cpu/armv8/fsl-layerscape
History
Mingkai Hu 13f7988067 armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency 
According to design specification, the L2 cache operates at the same
frequency as the A72 CPUs in the cluster with a 3-cycle latency, so
increase the L2 Data RAM and Tag RAM latency to 3 cycles, or else,
will run into different call trace issues.

Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-09-14 14:10:02 -07:00
..
doc armv8: fsl_lsch2: Add LS1046A SoC support 2016-07-26 09:02:23 -07:00
cpu.c armv8: ls2080a: Remove debug server support 2016-09-14 14:07:19 -07:00
cpu.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
fdt.c ARMv8/Layerscape: switch SMP method accordingly 2016-07-19 11:34:00 -07:00
fsl_lsch2_serdes.c fsl: serdes: ensure accessing the initialized maps of serdes protocol 2016-09-14 14:06:49 -07:00
fsl_lsch2_speed.c armv8: fsl_lsch2: Add LS1046A SoC support 2016-07-26 09:02:23 -07:00
fsl_lsch3_serdes.c fsl: serdes: ensure accessing the initialized maps of serdes protocol 2016-09-14 14:06:49 -07:00
fsl_lsch3_speed.c Fix various typos, scattered over the code. 2016-05-05 21:39:26 -04:00
lowlevel.S armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency 2016-09-14 14:10:02 -07:00
ls1012a_serdes.c armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
ls1043a_serdes.c armv8/ls1043ardb: Add LS1043ARDB board support 2015-10-29 10:34:01 -07:00
ls1046a_serdes.c armv8: fsl_lsch2: Add LS1046A SoC support 2016-07-26 09:02:23 -07:00
ls2080a_serdes.c armv8: fsl-layerscape: Updating entries in Serdes Table 2016-03-21 12:42:13 -07:00
Makefile armv8: fsl_lsch2: Add LS1046A SoC support 2016-07-26 09:02:23 -07:00
mp.c armv8: fsl-layerscape: Fix "cpu release" command 2015-11-30 09:11:12 -08:00
ppa.c ls1043ardb: PPA: add PPA validation in case of secure boot 2016-09-14 14:06:39 -07:00
soc.c fsl-layerscape: Add workaround for PCIe erratum A010315 2016-09-14 14:07:13 -07:00
spl.c arm: fsl-layerscape: move forward the non-secure access permission setup 2016-09-14 14:06:56 -07:00