mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-29 22:33:44 +09:00
52d093112a
The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz on Allwinner H3 and using PLL6 as the clock source (PLL6/3). This can be verified by reading the value of the AHB1_APB1_CFG_REG register via /dev/mem. It always reads as 0x3180 regardless of the current cpufreq operating point. So this configuration should be safe for use in U-Boot too. PLL6 also needs to be configured before it is used as the clock source, according to the "CCU / Programming Guidelines" section of the Allwinner manual. The current low AHB1 clock speed is limiting the USB transfer speed when booting via FEL. This patch can increase the FEL USB transfer speed from ~510 KB/s to ~950 KB/s. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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| .. | ||
| clock_sun4i.h | ||
| clock_sun6i.h | ||
| clock_sun9i.h | ||
| clock.h | ||
| cpu_sun4i.h | ||
| cpu_sun9i.h | ||
| cpu.h | ||
| cpucfg_sun6i.h | ||
| display.h | ||
| dma_sun4i.h | ||
| dma.h | ||
| dram_sun4i.h | ||
| dram_sun6i.h | ||
| dram_sun8i_a23.h | ||
| dram_sun8i_a33.h | ||
| dram_sun8i_h3.h | ||
| dram.h | ||
| gpio.h | ||
| i2c.h | ||
| mmc.h | ||
| p2wi.h | ||
| pmic_bus.h | ||
| prcm.h | ||
| rsb.h | ||
| spl.h | ||
| sys_proto.h | ||
| timer.h | ||
| tzpc.h | ||
| usb_phy.h | ||
| watchdog.h | ||