Commit Graph

53981 Commits

Author SHA1 Message Date
Chris Packham
ebb1a59325 ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").

The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:

  ddr3: add missing txsdll parameter
  ddr3: fix tfaw timimg parameter
  ddr3: fix trrd timimg parameter
  merge ddr3 topology header file with mv_ddr_topology one
  mv_ddr: a38x: fix zero memory size scrubbing issue

The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef

    find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
        xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
                 -UCONFIG_APN806 -UCONFIG_MC_STATIC \
                 -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
                 -UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
                 -UA70X0

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-12-08 16:19:40 +01:00
Tom Rini
3589025867 Merge branch '2018-12-06-master-imports'
- Various FAT fixes
- Hardware spinlock uclass
- DMA uclass
- Various am335x fixes
- DT resyncs for a number of TI platforms
- stm32 updates
2018-12-07 10:55:12 -05:00
Felix Brack
fdce9d35dc arm: dts: am33xx: Sync dts with Linux 4.20.0
This patch synchronizes the am33xx SoC specific files with those from
Linux 4.20.0. Hence all board maintainers of am33xx based boards are
on the cc list.
The main purpose of this patch is to prevent further diverging of the
dts files from U-Boot and those from Linux. It aims to set the stage
for the synchronization of board specific dts files. Example: I'm the
maintainer of the PDU001 board: once this patch is applied successfully
I will make changes to the board specific dts file in Linux only and
then post a patch with a copy of this exact dts file to U-Boot. This
will make U-Boot and Linux remain in sync.
The stumbling block of https://patchwork.ozlabs.org/patch/943627 was
removed by the patch https://patchwork.ozlabs.org/patch/962428 from
Lokesh Vutla (many thanks!). This omap-serial driver allows using the
Linux am33xx.dtsi file in U-Boot.
Other changes to dts and dtsi files made by this patch are mainly to
prevent _new_ warnings during the build process. Especially the warning
at pinmux@800 stating 'unnecessary #address-cells/#size-cells without
"ranges" or child "reg"' was not removed. This warning is a good example
showing the benefit of the synchronization: if it needs to be fixed it
will be fixed in Linux and ported back to U-Boot.
Buildman reports all 46 am33xx SoC based boards to build fine, with
warnings of course. Nevertheless this patch should be tested thoroughly
on as many boards as possible to prevent any collateral damage.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 08:13:51 -05:00
Heiko Schocher
8fb2391ea6 spl/tpl: change banner into upper case
commit d633006463 ("spl: Add a define for SPL_TPL_PROMPT")

changes the SPL/TPL banner from upper case into lower
case. As SPL and TPL are three-letter acronyms and they
are written in upper case, change it back to upper case.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 08:13:51 -05:00
Adam Ford
8a15bdb040 ARM: DTS: da850-evm: Re-sync da850-evm.dts from Linux 4.20
There has been some natural evolution of the device tree, so
resync with 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:50 -05:00
Adam Ford
ae67a9b330 ARM: dts: da850-lcdk: Sync from Linux 4.20
Re-synce the device tree files from Linux 4.20

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:50 -05:00
Adam Ford
031288abe9 ARM: DTS: da850: Sync from Linux 4.20
Re-sync with 4.20 due some some natural evolution.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:50 -05:00
Adam Ford
343b606261 ARM: DTS: Resync LogicPD-Torpedo-37xx-devkit with Linux 4.20
Migrate some small device tree fixes from Linux 4.20.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:50 -05:00
Adam Ford
faef5b376e ARM: DTS: Resync LogicPD SOM-LV with Linux 4.20
There have been a few fixes to the device trees, so this
re-syncs the dts/dtsi files with Linux

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:49 -05:00
Felix Brack
5eca073ae6 serial: omap: Add code for early debugging
This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-07 08:13:49 -05:00
Alexey Brodkin
f0d964f4db travis: Bump ARC tools to arc-2018.09
Build tested in Travis, see:
https://travis-ci.org/abrodkin/u-boot/jobs/462808237

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-07 08:13:49 -05:00
Adam Ford
5792f0d8be ARM: DTS: Resync am3517-evm.dts with Linux 4.20
The DTS file for the AM3517 had the incorrect CD polarity.  Resync with
the fixed DTS file from Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-12-07 08:13:48 -05:00
Frank Wunderlich
bace22175b ensure active menuitem is inside menu
Hi,

setting active menuitem currently can be outside of menu which results in invisible selection

attached Patch fixes this

regards Frank

>From 1d9c4cb8b3e2dd9b0a7a6a2d4a21684d0a099dbf Mon Sep 17 00:00:00 2001
From: Frank Wunderlich <frank-w@public-files.de>
Date: Sun, 2 Dec 2018 11:23:53 +0100
Subject: [PATCH] ensure active menuitem is inside menu

if active menuitem is defined via environment var it can be outside the menu (>=menuitem-count)

this patch resets this definition back to 0

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2018-12-07 08:13:48 -05:00
Patrice Chotard
530b63c228 pinctrl: stm32: Update stm32_pinctrl_get_gpio_dev()
Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.

stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.

Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:48 -05:00
Patrice Chotard
8b6d45ab64 gpio: stm32f7: Remove CONFIG_CLK flag.
As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:48 -05:00
Patrice Chotard
b2f84e37e2 gpio: stm32f7: Move STM32_GPIOS_PER_BANK into gpio.h
To allow access to this define by other driver, move
it into gpio.h

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Patrice Chotard
dbf928dd26 gpio: stm32f7: Add gpio bank holes management
In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.

For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Patrice Chotard
043550415b pinctrl: stm32: Move gpio_dev list filling outside probe()
Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-07 08:13:47 -05:00
Álvaro Fernández Rojas
e9e8d80d8c serial: bcm6858: remove driver and switch to bcm6345
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Álvaro Fernández Rojas
47b1cbaf02 arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Álvaro Fernández Rojas
09ace9161b serial: bcm6345: switch to raw I/O functions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:46 -05:00
Felix Brack
2aadff0feb arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMC
This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001
board. It depends on Patrice Chotard's patch 'power: regulator: denied
disable on always-on regulator' which prevents power cycling the vmmc
supply. Without this patch the board will not boot as vmmc is
unfortunately used by other board components, not just eMMC and micro SD
card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card
detection input' is required to boot from external micro SD card. Without
this patch no SD card will be detected and hence booting will fail.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 08:13:46 -05:00
Felix Brack
ae0a157b38 dts: am335x-pdu001: Fix polarity of card detection input
When a micro SD card is inserted in the PDU001 card cage, the card
detection switch is opened and the corresponding GPIO input is driven
by a pull-up. Hence change the active level of the card detection
input from low to high.

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-12-07 08:13:45 -05:00
Grygorii Strashko
b330991874 test: dma: add dma-uclass test
Add a sandbox DMA driver implementation (provider) and corresponding DM
test.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
2018-12-07 08:13:45 -05:00
Álvaro Fernández Rojas
27ab27f850 dma: add channels support
This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).

DMA channle API:
 dma_get_by_index()
 dma_get_by_name()
 dma_request()
 dma_free()
 dma_enable()
 dma_disable()
 dma_prepare_rcv_buf()
 dma_receive()
 dma_send()

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(),
 add metadata to send/receive ops, add dma_prepare_rcv_buf(),
 minor clean up]
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-07 08:13:45 -05:00
Álvaro Fernández Rojas
10b4dc5208 dma: move dma_ops to dma-uclass.h
Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
2018-12-07 08:13:45 -05:00
Andrew F. Davis
205b010caf configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART boot
UART booting requires YMODEM support. Add this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 08:13:44 -05:00
Eugen.Hristev@microchip.com
bbaeb7ac22 ARM: at91: lds: add test for SPL binary size and bss size
Add test for the SPL binary size and the bss section size.
This will throw an error at build time if the SPL sections
do not fit in the designated RAM area, thus avoiding oversizing the SPL.

Based on original work by Wenyou Yang.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-12-07 08:13:44 -05:00
Benjamin Gaignard
075b0185b6 pinctrl: stm32: make pinctrl use hwspinlock
Protect configuration registers with a hardware spinlock.

If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:33 -05:00
Benjamin Gaignard
9119f547d3 hwspinlock: add stm32 hardware spinlock support
Implement hardware spinlock support for STM32MP1.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:33 -05:00
Benjamin Gaignard
283bcd9a34 clk: stm32: add hardware spinlock clock
Add hardware spinlock in the list of the clocks.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Benjamin Gaignard
7f84fc670b dm: Add Hardware Spinlock class
This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:32 -05:00
Keerthy
3b074fb22b board: ti: ks2_evm: Over ride spl_get_load_buffer function
Currently k2 spi boot is broken as the image header
is getting copied to an invalid memory location

CONFIG_SYS_TEXT_BASE - sizeof (struct image_size)
which maps to 0xc000000 - 0x40 = 0xbffffc0 being a reserved
location.

We cannot change the CONFIG_SYS_TEXT_BASE address as the single
stage boots like UART boot will need the address to be 0xc000000
hence override the spl_get_load_buffer to have image_header
address as CONFIG_SYS_TEXT_BASE aka 0xc000000

Signed-off-by: Keerthy <j-keerthy@ti.com>
2018-12-06 23:26:32 -05:00
Philipp Tomsich
291da96b8e clk: Allow clock defaults to be set during re-reloc state for SPL only
In commit e5e06b65ad ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed.  While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.

With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).

This reintroduces the guard from commit f4fcba5c5b ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.

References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 23:26:31 -05:00
Patrick Wildt
8b021bb956 fs: fix FAT name extraction
The long name apparently can be accumulated using multiple
13-byte slots.  Unfortunately we never checked how many we
can actually fit in the buffer we are reading to.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2018-12-06 23:26:31 -05:00
Patrick Wildt
cd80a4fe61 fs: check FAT cluster size
The cluster size specifies how many sectors make up a cluster.  A
cluster size of zero makes no sense, as it would mean that the
cluster is made up of no sectors.  This will later lead into a
division by zero in sect_to_clust(), so better take care of that
early.

The MAX_CLUSTSIZE define can reduced using a define to make some
room in low-memory system.  Unfortunately if the code reads a
filesystem with a bigger cluster size it will overflow the buffer.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2018-12-06 23:26:31 -05:00
Patrice Chotard
16462a3572 configs: stm32f746-disco: Fix stm32f746-disco boot
Since commit 8f651ca60b ("pinctrl: stm32: Add get_pins_count() ops")
stm32f746-disco can't boot.

This is due to new memory allocation into STM32 pinctrl driver,
increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-12-06 23:26:30 -05:00
Simon Glass
2cb132ad2b main: Drop more #ifdefs
Now that many things are converted to Kconfig we can drop most of the

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-12-06 23:26:30 -05:00
Martin Fuzzey
b95938117c w1: fix occasional enumeration failure
Sometimes enumeration fails (about 1 in 50 times on my custom board).

The underlying reason is probably electrical but Linux does not have
the problem.

Comparing the Linux / u-boot implementations shows that Linux
retries the error case whereas u-boot aborts early.

Removing the early abort in u-boot fixes the problem.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-12-06 17:15:15 -05:00
Tom Rini
57dbc15143 rockchip: rk3399: Add MAINTAINERS entry
Add an entry for the Ficus EE board to the existing rock960 MAINTAINERS
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-06 10:24:12 -05:00
Tom Rini
26fe08dcd2 - Changes the declaration of regs_phy in dwc2-otg to uintptr_t
to ensure it can be cast to void* for use with writel().
 - Add the Rock960 and Ficus boards.
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Merge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchip

- Changes the declaration of regs_phy in dwc2-otg to uintptr_t
  to ensure it can be cast to void* for use with writel().
- Add the Rock960 and Ficus boards.
2018-12-06 10:15:08 -05:00
Manivannan Sadhasivam
467877341a rockchip: rk3399: Add Ficus EE board support
Add board support for Ficus EE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[Reworked based on common Rock960 family support]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 16:04:49 +01:00
Manivannan Sadhasivam
07f7687869 rockchip: rk3399: Add Rock960 CE board support
Add board support for Rock960 CE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* USB 2.0
* MMC

This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
is being used on the board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 16:04:49 +01:00
Manivannan Sadhasivam
1bad5e1492 rockchip: rk3399: Add common Rock960 family from Vamrs
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.

Below are some of the key differences between both Rock960 and Ficus
boards:

1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960

The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-12-06 16:04:49 +01:00
Randy Li
2c9050cd3d arm: dts: rockchip: add some common pin-settings to rk3399
Those pins would be used by many boards.

Commit grabbed from Linux:

commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
Author: Randy Li <ayaka@soulik.info>
Date:   Thu Jun 21 21:32:10 2018 +0800

    arm64: dts: rockchip: add some common pin-settings to rk3399

    Those pins would be used by many boards.

    Signed-off-by: Randy Li <ayaka@soulik.info>
    Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 16:04:49 +01:00
Philipp Tomsich
63162724e2 usb: dwc2-otg: make regs_phy (in platdata) a uintptr_t
The regs_phy field of the platform data structure for dwc2-otg is
today declared an unsigned int, but will eventually be cast into a
void* for a writel operation.  This triggers errors on modern GCC
versions.

E.g. we get the following error with GCC 6.3:
  drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable':
  arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
   #define __arch_putl(v,a)  (*(volatile unsigned int *)(a) = (v))
                               ^
  arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl'
   #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                                  ^~~~~~~~~~~
  drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel'
    writel(val, pdata->regs_phy + reg->offset);
    ^~~~~~

This commit changes regs_phy to be a uintptr_t to ensure that it is
large enough to hold any valid pointer (and fix the associated
warning).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-12-06 16:04:49 +01:00
Tom Rini
2a055ea532 Minor sandbox enhancements / fixes
tpm improvements to clear up v1/v2 support
 buildman toolchain fixes
 New serial options to set/get config
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Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dm

Minor sandbox enhancements  / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config
2018-12-05 20:32:25 -05:00
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Boris Brezillon
08898e8b22 mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.

This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).

Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
7371944a71 mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).

Implement ->remove() and call spi_flash_mtd_unregister() from there.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30