Commit Graph

12412 Commits

Author SHA1 Message Date
Fabio Estevam
6c94a45c23 wandboard: Add support for the MX6QP variant
Add support for the latest MX6QP wandboard variant.

Based on Richard Hu's work from Technexion's U-Boot tree.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2017-10-16 10:02:45 -02:00
Marek Vasut
59d4771838 ARM: imx6: Add DHCOM i.MX6 PDK board support
Add support for the DHCOM i.MX6 PDK board. This board has:
- FEC ethernet
- EHCI USB host
- 3x SDMMC

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 0a333602df)
2017-10-12 17:40:47 -03:00
Diego Dorta
fdb70bf620 mx6: sys_proto: Add prototypes for imx6_pcie_toggle() functions
When compiling with W=1 errors are observed:

drivers/pci/pcie_imx.c:517:12: warning: no previous prototype for ‘imx6_pcie_toggle_power’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_power(void)

drivers/pci/pcie_imx.c:528:12: warning: no previous prototype for ‘imx6_pcie_toggle_reset’ [-Wmissing-prototypes] __weak int imx6_pcie_toggle_reset(void)

Remove these warnings by adding the functions prototypes on arch-mx6/sys_proto.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
(cherry picked from commit e2000731ae)
2017-10-12 17:40:46 -03:00
Diego Dorta
308e7844f8 mx6: clock: Add a prototype for do_mx6_showclocks()
When compiling with W=1 the following warning is observed:

arch/arm/mach-imx/mx6/clock.c:1268:5: warning: no previous prototype for ‘do_mx6_showclocks’ [-Wmissing-prototypes] int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

Remove this warning by adding the function prototype into arch-mx6/clock.h file.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
(cherry picked from commit 342b4b09b1)
2017-10-12 17:40:46 -03:00
Ilya Ledvich
0edf2007c6 arm: imx7d: add support for Compulab cl-som-imx7
Add initial support for Compulab cl-som-imx7 SoM.
The initial support includes:
 - MMC
 - eMMC
 - SPI flash
 - I2C
 - FEC
 - USB
 - Serial console

Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
(cherry picked from commit 5eb7740e2569a942cc03db077089cb73ded62963)
2017-10-02 14:31:33 -03:00
Uri Mashiach
f62d34202d imx: mx7: SPL support for i.MX7
Add configuration file and spl_boot_device function for the i.MX7 SPL.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
(cherry picked from commit e850961371d3b18f50ca4d71daf68e3a066116c3)
2017-10-02 14:31:33 -03:00
Uri Mashiach
b4ee050163 imx: mx7: DDR controller configuration for the i.MX7 architecture
The configuration files imximage.cfg are used for the DDR controller
configuration.
Add DDR configuration function to replace the DDR controller
configuration in the imximage.cfg file. The function can be used for
DDR size detection.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
(cherry picked from commit 125db79b96f7496e8e922b6710ee2de6cfb47363)
2017-10-02 14:31:33 -03:00
Uri Mashiach
9ad01a2efb imx: mx7: fix the CCM_ macros
The CCM_ macros use the CCM_BASE_ADDRESS macro, which doesn't exist.
Replace the CCM_BASE_ADDRESS macros with CCM_BASE_ADDR.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
(cherry picked from commit 194622c35f391c65728120fd4cf3b69d09c2a20a)
2017-10-02 14:31:33 -03:00
Diego Dorta
916afc51de mx6: soc: Include <asm/bootm.h> header file
When compiling with W=1 the following warning is observed:

arch/arm/mach-imx/mx6/soc.c:213:12: warning: no previous prototype for ‘get_board_rev’ [-Wmissing-prototypes] u32 __weak get_board_rev(void)

Fix the build warning by including <asm/bootm.h>.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
(cherry picked from commit d0b3b5b4fcb4b7d19f498045073a706676f4287e)
2017-10-02 14:31:32 -03:00
Diego Dorta
96fd173ca1 imx: sys_proto: Add a prototype for board_mmc_get_env_dev()
When compiling with W=1 the following warning is observed:

board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning:
no previous prototype for ‘board_mmc_get_env_dev’
[-Wmissing-prototypes] int board_mmc_get_env_dev(int devno)

Remove this warning by adding the function prototype into sys_proto.h file.

Signed-off-by: Diego Dorta <diego.dorta@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 18b61c4e3e312711169a9b36b26630dac34ae8f5)
2017-10-02 14:31:32 -03:00
Anatolij Gustschin
a3581b705a imx6: disable clock command and print_cpuinfo code in SPL
We do not use print_cpuinfo and clock command code in SPL,
disable it when building SPL image.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
(cherry picked from commit fbdffce800205ff27f2f7cbd377238364d6c4860)
2017-09-23 18:07:22 -03:00
Fabio Estevam
3766ef9cea toradex: imx6: Move g_dnl_bind_fixup() into common SPL code
Instead of having every board file to add its own g_dnl_bind_fixup()
implementation, move it to the common imx6 SPL code.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Łukasz Majewski <lukma@denx.de>
(cherry picked from commit 511db3bf5a)
2017-09-20 23:32:31 -03:00
Eric Nelson
58cb0bc9f0 imx: imx7d: remove CamelCase from ENET_xMHz macros
Update these macros to use all upper-case to avoid checkpatch
warnings:

	ENET_25MHz,
	ENET_50MHz,
	ENET_125MHz,

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
(cherry picked from commit 8590786acf)
2017-09-20 23:32:31 -03:00
Stefan Agner
2df17bffbc imx_common: detect USB serial downloader reliably
The current mechanism using SCR/GPR registers work well when
the serial downloader boot mode has been selected explicitly
(either via boot mode pins or using bmode command). However,
in case the system entered boot ROM due to unbootable primary
boot devices (e.g. empty eMMC), the SPL fails to detect that
it has been downloaded through serial loader and tries to
continue booting from eMMC:
  Trying to boot from MMC1
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

The only known way to reliably detect USB serial downloader
is by checking the USB PHY receiver block power state...

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
(cherry picked from commit e203dcf23e)
2017-09-20 23:32:31 -03:00
Stefan Agner
5615ed0835 imx: add macro to detect whether USB PHY is active
This macro allows to detect whether the USB PHY is active. This
is helpful to detect if the boot ROM has previously started the
USB serial downloader.

The idea is taken from the mfgtool support in the NXP U-Boot:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/?h=imx_v2016.03_4.1.15_2.0.0_ga&id=a352ed3c5184b95c4c9f7468f5fbb5f43de5e412

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
(cherry picked from commit 7d289d6239)
2017-09-20 23:32:31 -03:00
Chris Packham
f58ad98a62 usb: net: migrate USB Ethernet adapters to Kconfig
This migrates ASIX, ASIX88179, MCS7830, RTL8152 and SMSC95XX to Kconfig.
Update defconfigs.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-08 10:23:00 -04:00
Chris Packham
ae3584498b usb: net: migrate CONFIG_USB_HOST_ETHER to Kconfig
CONFIG_USB_HOST_ETHER is the framework that the drivers are dependent on
USB_HOST_ETHER. Use this as a menu and move the existing LAN75XX and
LAN78XX options under new menu. Finally update the defconfigs that need
CONFIG_USB_HOST_ETHER.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-08 10:21:46 -04:00
Kever Yang
0532ceef30 rockchip: enable SPL_SYSRESET config for all Rockchip SoCs
With Makefiles testing for $(SPL_TPL_)SYSRESET, we need SPL_SYSRESET
for do_reset() in SPL for Rockchip SoCs.

References: 87c16d4 "drivers: spl: consistently use the $(SPL_TPL_) macro"
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-08 11:45:19 +02:00
Kever Yang
e1f6881367 rockchip: rk3328: fix syscon id table
syscon id table need a dummy member as NULL ending, or else system
will panic while try to match a compatible in this table as a list.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-08 11:44:51 +02:00
Tom Rini
08d0c53d6b Merge git://git.denx.de/u-boot-rockchip 2017-09-05 07:11:46 -04:00
Wadim Egorov
40d4f79b81 rockchip: rk3288: Add reset reason detection
Sometimes it's helpful to know the reset reason caused in the SoC.
Add reset reason detection for the RK3288 SoC.
This will set an environment variable which represents the reset reason.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-09-05 11:04:35 +02:00
Tom Rini
a0e80c97c9 Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2017-09-04 22:17:59 -04:00
Marek Vasut
0d0915bef7 ARM: rmobile: Add missing IPSR18 bits to R8A7795 PFC
The IPSR18 register bits were missing from the R8A7795 ES2.0+ PFC
tables, which triggered a BUG() in sh_pfc driver. This is because
of an out-of-bounds access to the pinmux_gpios[] array in the PFC
tables, which was too short due to the missing IPSR18 bits.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-09-05 07:51:39 +09:00
Bin Meng
3fe6e6e2aa x86: baytrail: acpi: Add full reset bit to the reset register value in FADT
It was noticed a few times, that the reboot from Linux (reboot command)
is different from the reboot (reset command) under U-Boot. The U-Boot
version does seem to reset the board more deeply (PCI cards etc) than
the Linux reboot.

This is actually caused by missing full reset bit in the reset register
value in the ACPI FADT table.

Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
2017-09-02 23:35:55 +08:00
Adam Ford
edd1653f04 Convert CONFIG_SPL_OMAP3_ID_NAND to Kconfig
This converts the following to Kconfig:
   CONFIG_SPL_OMAP3_ID_NAND

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-09-01 20:45:26 -04:00
Adam Ford
fc760cc6e8 Convert CONFIG_SYS_I2C_BUS_MAX to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_BUS_MAX

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Fix AM43XX drop AM44XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-01 20:44:30 -04:00
Adam Ford
ac1d8ac871 Configs: Migrate I2C_BUS_MAX to CONFIG_SYS_I2C_BUS_MAX
For consistency with other platforms and in preparation of Kconfig
migration, let's change Several TI platforms that use I2C_BUS_MAX
to CONFIG_SYS_I2C_BUS_MAX

Signed-off-by: Adam Ford <aford173@gmail.com>
2017-09-01 17:56:20 -04:00
Tom Rini
48f6232e58 Kconfig: Migrate all of cmd/fastboot/Kconfig to defconfigs
- Move ANDROID_IMAGE_SUPPORT to top level Kconfig under images as it's
  not strictly part of fastboot.
- Add some defaults for the fastboot buffer location and size
- Migrate all options listed in cmd/fastboot/Kconfig
- Cleanup the README

Signed-off-by: Tom Rini <trini@konsulko.com>
2017-09-01 16:18:21 -04:00
Tom Rini
0b6e5b2c48 Merge git://git.denx.de/u-boot-sunxi 2017-09-01 13:30:19 -04:00
Dave Prue
6ff005cf19 sunxi: Fix CONFIG_SUNXI_GMAC references
SUNXI_GMAC was still used to configure the code where as the
same has been renamed and moved to Kconfig in below commit
"sunxi: Move SUNXI_GMAC to Kconfig"
(sha1: 4d43d065db)

Signed-off-by: Dave Prue <dave@prue.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
[Tweek commit message, config_whitelist.txt, build-whitelist.sh]
Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-09-01 20:48:27 +05:30
Tom Rini
6aee2ab68c Merge git://git.denx.de/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	configs/imx6qdl_icore_mmc_defconfig
	configs/imx6qdl_icore_rqs_defconfig
2017-09-01 10:40:59 -04:00
Tom Rini
4109d70293 Merge git://git.denx.de/u-boot-marvell 2017-09-01 10:33:21 -04:00
Tom Rini
e4adc8ed3c Merge git://git.denx.de/u-boot-uniphier
- add {ofnode,dev}_read_resource_byname
- provide DT probe hook to Denali NAND driver
- update clk/reset driver
- update DT
- misc cleanups
2017-09-01 10:32:35 -04:00
Tom Rini
9ec61dbc80 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2017-09-01 10:31:07 -04:00
Jagan Teki
46668df5d0 i.MX6Q: spl: Fix falcon to use dram_init_banksize
Memory dt node update introduced by spl_fixup_fdt() in below
commit was making DDR configuration in-appropriate
to boot falcon mode. Hence added dram_init_banksize for
explicit assignment of  proper base and size of DDR.

"boot: fdt: Perform arch_fixup_fdt() on the given device tree for falcon boot"
(sha1: 6e7585bb64)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2017-08-30 12:18:26 +02:00
Stefan Agner
624da53ca8 imx: remove SATA boot mode for i.MX 6UL and 6ULL
The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d4d ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")

Fixes: 3bd1642d4d ("imx: fix USB boot mode detection for i.MX 6UL and 6ULL")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-30 12:17:53 +02:00
Chris Packham
dbc3e64fd1 ARM: mvebu: add "spi-flash" compatible string
U-boots spi-nor support is currently considered a work in progress. For
now to avoid issues it is necessary to add a "spi-flash" compatible
string. Eventually the "jedec,spi-nor" will be sufficient when the core
U-boot code is updated to support it.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-30 10:03:35 +02:00
Masahiro Yamada
d8a10e7fac ARM: uniphier: set system bus pinmux for PXs3
The system bus is not enabled by default for NAND, eMMC boot
etc. of PXs3.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00
Masahiro Yamada
b173c19663 ARM: uniphier: move CONFIG_NAND to defconfig
This imply was added when the option was moved by the moveconfig tool,
but the intention is not clear.  Move it to defconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00
Masahiro Yamada
31c86aa7fd ARM: dts: uniphier: update PXs3 SoC/board DT
Support PXs3 SoC and its reference development board.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00
Masahiro Yamada
6c9e46efae ARM: dts: uniphier: sync with Linux
Import updates queued up for Linux 4.14-rc1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00
Dai Okamura
4013bbb1f3 ARM: uniphier: fix DSPLL init code for LD20 SoC
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:07:04 +09:00
Masahiro Yamada
e0daca7de5 ARM: uniphier: remove ad-hoc pin settings for NAND
This is now set up by the pinctrl driver when the NAND driver is
probed.  Remove the legacy code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:06:57 +09:00
Masahiro Yamada
4914a68de7 ARM: uniphier: add PLL settings for PXs3
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:03:11 +09:00
Masahiro Yamada
a55957b9ad ARM: uniphier: move PLLCTRL register macros to each SoC .c file
The new SoC PXs3 changed the address of PLL, but still uses the
same PLL name.  We can not define SC_*PLLCTRL in the common header.
Move them to per-SoC .c file.  Also, fix some PLL comments.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:03:11 +09:00
Masahiro Yamada
546197b986 ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settings
The #include <common.h> was added for mdelay().  Later, the declaration
of mdelay was moved to <linux/delay.h> by commit 5bc516ed66 ("delay:
collect {m, n, u}delay declarations to include/linux/delay.h").

There is no need to include <common.h> now.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-30 09:03:11 +09:00
Anatolij Gustschin
ffc36f57bc imx6: don't include unneeded boot_mode array in SPL
The soc_boot_modes array is only used by bmode command
and not needed in SPL. Don't include it into SPL.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2017-08-29 09:49:51 +02:00
Anatolij Gustschin
ae64226dbe imx: timer: don't clear the GPT control register multiple times
There is no need to clear the control register 100 times in a
loop, a single zero write clears the register. I didn't find any
justification why clearing this register in a loop is needed
(no info in i.MX6 errata or GPT timer linux driver, linux driver
uses single write to clear this control register).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2017-08-29 09:47:28 +02:00
Maxime Ripard
343ff16106 sunxi: Enable MMC new mode for A83T
The eMMC controller for the A83T uses the new operating mode. Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28 22:36:48 +05:30
Maxime Ripard
de9b1771c3 mmc: sunxi: Support new mode
Almost all of the newer Allwinner SoCs have a new operating mode for the
eMMC clocks that needs to be enabled in both the clock and the MMC
controller.

Details about that mode are sparse, and the name itself (new mode vs old
mode) doesn't give much details, but it seems that the it changes the
sampling of the MMC clock. One side effect is also that it divides the
parent clock rate by 2.

Add support for it through a Kconfig option.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2017-08-28 22:36:44 +05:30