* 'master' of git://git.denx.de/u-boot-arm:
ARM: MX5: Fix broken leftover TO-2 errata workaround
MX31: Cleanup clock function
scb9328: Add ARM relocation support
am3517evm: change console device from ttyS2 to ttyO2
Remove volatile qualifier in get_ram_size() calls
TI: TNETV107X Fix Build Error
ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
arm: add CONFIG_MACH_TYPE setting and documentation
arm: add __ilog2 function
Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
EfikaMX: Enable EXT2 booting
EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
EfikaMX: Use correct imximage.cfg
MX27: Update to autogenerated asm-offsets.h
MX5: Update to autogenerated asm-offsets.h
imx: Add support for zmx25 board
imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
imx: Add auto generation of asm-offsets.h for imx25
imx: Add support for USB EHCI on imx25
imx: Use correct imx25 reset.c
imx: Add get_tbclk() function for imx25
ARM: Update maintainer of board scb9328
mx27: Make the UART port number explicit
build: Add targets for auto gen of asm-offsets.h and use it in imx35
mx31pdk: cosmetic: Fix line over 80 characters
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.
Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch fixes compiler errors due to missing definitions of
CONFIG_SYS_SDRAM_BASE and CONFIG_SYS_INIT_SP_ADDR.
It also does some cleanup: CONFIG_SYS_TEXT_BASE was moved to scb9328.h,
obsolete config.mk was removed. The scb9328 board has 1 DRAM bank, so don't
ask for more banks. CONFIG_NR_DRAM_BANKS will ever be 1.
Signed-off-by: Torsten Koschorrek <koschorrek@synertronixx.de>
the serial device names have been changed from ttySx to ttyOx, so the
console device name should be also changed to support the latest kernel
versions.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Acked-by: Vaibhav Hiremath<hvaibhav@ti.com>
P2041RDB Specification:
-----------------------
Memory subsystem:
* 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
* 128 Mbyte NOR flash single-chip memory
* 256 Kbit M24256 I2C EEPROM
* 16 Mbyte SPI memory
* SD connector to interface with the SD memory card
Ethernet:
* dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
* dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
* dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
PCIe:
* Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
* Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
I2C:
* I2C1: Real time clock, Temperature sensor, Memory module
* I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Add a new "fdt_high" enviroment variable. This can be used to control (or prevent) the
relocation of the flattened device tree on boot. It can be used to prevent relocation
of the fdt into highmem. The variable behaves similarly to the existing "initrd_high"
variable.
Signed-off-by: David A. Long <dave.long@linaro.org>
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle". To facilitate the migration from
"linux,phandle" to "phandle", introduce function fdt_create_phandle(),
which creates a phandle in a given node. For now, we create both the
"phandle" and "linux,phandle" properties. A later version of this
function will remove support for "linux,phandle".
Signed-off-by: Timur Tabi <timur@freescale.com>
Introduce two functions, fdt_verify_alias_address() and
fdt_get_base_address(), which can be used to verify the physical address
of a device in a device tree.
fdt_get_base_address() returns the base address of an SOC or PCI node.
fdt_verify_alias_address() prints a message if the address of a node
specified by an alias does not match the given physical address.
Signed-off-by: Timur Tabi <timur@freescale.com>
For ages, we've been talking about adding functions to libfdt to allow
iteration through properties. So, finally, here are some.
I got bogged down on this for a long time because I didn't want to
expose offsets directly to properties to the callers. But without
that, attempting to make reasonable iteration functions just became
horrible. So eventually, I settled on an interface which does now
expose property offsets. fdt_first_property_offset() and
fdt_next_property_offset() are used to step through the offsets of the
properties starting from a particularly node offset. The details of
the property at each offset can then be retrieved with either
fdt_get_property_by_offset() or fdt_getprop_by_offset() which have
interfaces similar to fdt_get_property() and fdt_getprop()
respectively.
No explicit testcases are included, but we do use the new functions to
reimplement the existing fdt_get_property() function.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit:
73dca9ae0b9abe6924ba640164ecce9f8df69c5a Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Currently, the Linux kernel, libfdt and dtc, when using flattened
device trees encode a node's phandle into a property named
"linux,phandle". The ePAPR specification, however - aiming as it is
to not be a Linux specific spec - requires that phandles be encoded in
a property named simply "phandle".
This patch adds support for this newer approach to dtc and libfdt.
Specifically:
- fdt_get_phandle() will now return the correct phandle if it
is supplied in either of these properties
- fdt_node_offset_by_phandle() will correctly find a node with
the given phandle encoded in either property.
- By default, when auto-generating phandles, dtc will encode
it into both properties for maximum compatibility. A new -H
option allows either only old-style or only new-style
properties to be generated.
- If phandle properties are explicitly supplied in the dts
file, dtc will not auto-generate ones in the alternate format.
- If both properties are supplied, dtc will check that they
have the same value.
- Some existing testcases are updated to use a mix of old and
new-style phandles, partially testing the changes.
- A new phandle_format test further tests the libfdt support,
and the -H option.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This was extracted from the DTC commit:
d75b33af676d0beac8398651a7f09037555a550b Mon Sep 17 00:00:00 2001
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
On i.MX27, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
On i.MX5, the asm-offsets.h file is not yet generated as it should be.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
mx27_uart_init_pins does the IOMUX setting for UART1 port.
Change the function name to make the UART port number explicit.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
This erratum doesn't exist on this processor, and the workaround
spins on a non-existent register, causing boot to hang.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Move to use hwconfig for usb mode & phy type instead of magic
'usb_phy_type' environment variable on the following platforms:
MPC8536DS, P1020RDB, P1020RDB-PC, P1010RDB, P2020RDB, P2020RDB-PC,
P2020RDB, P3041DS, P4080DS, & P5020DS.
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Enable buffer write for better performance. This platform uses a NOR flash
chip which supports write buffer programming. CFI driver can query the
buffer size and use it to program the flash for best performance.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though
enabling a bank causes it to reset. Because the reset was required for
multiple errata, it was not properly enclosed in an #ifdef, and so was
not removed with all the other rev1 errata work-arounds.
Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10. The bank reset also happened to enable bank 3 (apparently an
undocumented feature). Simply removing the reset breaks these two
protocols.
It turns out that every time we call enable_bank(), we do want at least
one lane of the bank enabled, either because the bank is supposed to be
enabled, or because we need the clock from that bank enabled.
For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.
Note that the side effect of these changes is that the work-arounds for
these two errata are now linked. Specifically, if SERDES-A001 is
enabled, then we need SERDES-8 enabled as well.
Because this was the only SERDES bank soft-reset, there is no need to
implement a work-around for erratum SERDES-A003.
Also fix an off-by-one error in a printf().
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ed Swarthout <swarthou@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Add this option to allow boards to override the default read-to-write
turnaround time for better performance.
Signed-off-by: York Sun <yorksun@freescale.com>
Resolve P1020 second USB controller multiplexing with eLBC
- mandatory to mention USB2 in hwconfig string to select it
over eLBC, otherwise USB2 node is removed
- works only for SPI and SD boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Specify hwconfig usage for USB mode and phy change
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Modify support for USB mode fixup:
- Add common support for USB mode and phy type
device tree fix-up for all USB controllers
mentioned in hwconfig string
- Fetch USB mode and phy type via hwconfig; if not
defined in hwconfig, then fetch them from env
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
The P1023RDS board is the reference board for the P1023 SoC.
Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
UART, I2C, etc.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If DDR initialziation uses a speed table and the speed is not matched,
print a warning message instead of silently ignoring.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Allow overriding RCW for all RDIMM, not only quad-rank ones.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
In case of empty SPD or checksum error, fallback to raw timing on
supported boards.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
