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https://github.com/brain-hackers/u-boot-brain
synced 2024-09-29 08:00:26 +09:00
imx: Add auto generation of asm-offsets.h for imx25
Offsets to registers may be needed in asm code. This patch adds automated generation of these offsets form C structures. Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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@ -34,6 +34,8 @@ all: $(obj).depend $(LIB)
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$(LIB): $(OBJS)
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$(call cmd_link_o_target, $(OBJS))
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$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
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#########################################################################
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# defines $(obj).depend target
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60
arch/arm/cpu/arm926ejs/mx25/asm-offsets.c
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60
arch/arm/cpu/arm926ejs/mx25/asm-offsets.c
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@ -0,0 +1,60 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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/* Clock Control Module */
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DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
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DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
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DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
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DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
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DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
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DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
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/* Enhanced SDRAM Controller */
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DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
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DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
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DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
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/* Multi-Layer AHB Crossbar Switch */
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DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
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DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
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DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
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DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
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DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
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DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
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DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
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DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
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DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
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DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
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DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
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DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
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DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
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DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
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DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
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/* AHB <-> IP-Bus Interface */
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DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
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DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
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return 0;
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}
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@ -141,6 +141,45 @@ struct fuse_bank0_regs {
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u32 mac_addr[6];
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};
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/* Multi-Layer AHB Crossbar Switch (MAX) registers */
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struct max_regs {
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u32 mpr0;
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u32 pad00[3];
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u32 sgpcr0;
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u32 pad01[59];
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u32 mpr1;
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u32 pad02[3];
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u32 sgpcr1;
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u32 pad03[59];
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u32 mpr2;
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u32 pad04[3];
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u32 sgpcr2;
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u32 pad05[59];
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u32 mpr3;
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u32 pad06[3];
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u32 sgpcr3;
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u32 pad07[59];
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u32 mpr4;
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u32 pad08[3];
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u32 sgpcr4;
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u32 pad09[251];
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u32 mgpcr0;
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u32 pad10[63];
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u32 mgpcr1;
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u32 pad11[63];
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u32 mgpcr2;
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u32 pad12[63];
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u32 mgpcr3;
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u32 pad13[63];
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u32 mgpcr4;
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};
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/* AHB <-> IP-Bus Interface (AIPS) */
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struct aips_regs {
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u32 mpr_0_7;
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u32 mpr_8_15;
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};
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#endif
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/* AIPS 1 */
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