Commit Graph

31302 Commits

Author SHA1 Message Date
Michal Simek
cb7ea82059 ARM: zynqmp: Wire up ethernet controllers
Wire up ethernet controllers and enable MII and BOOTP options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:27 +02:00
Michal Simek
6d6e3dbefe ARM: zynq: Add support for zc770-xm011
Add xm011 DTS file and related configs and configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:26 +02:00
Michal Simek
5c45b16678 ARM: zynq: DT: Update zc770 dtses
Platform DTSes are missing content needed for platform to be able to use
OF binding and DM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:26 +02:00
Michal Simek
91f9f17262 ARM: zynq: DT: Add zc702 pushbuttons to DT as gpio-keys
Adds the two MIO connected pushbuttons on the zc702 board to the
devicetree as a single multi-key device for us with the gpio-keys driver.

Signed-off-by: Ezra Savard <ezra.savard@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:26 +02:00
Michal Simek
d50cb3d64b ARM: zynq: DT: Add missing interrupt for L2 pl310
Add pl310 interrupt to the Zynq devicetree.

Signed-off-by: Alex Wilson <alex.david.wilson@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:26 +02:00
Michal Simek
b4e9eaf71f ARM: zynq: DT: Get rid of ps-clk-frequency
ps-clk-frequency is platform specific setting and shouldn't be the part
of DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:25 +02:00
Michal Simek
05e7ca63b7 ARM: zynq: DT: Update years in copyright
Trivial.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:25 +02:00
Michal Simek
999667ca9c ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernel
Syncup with the latest DT from the Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:25 +02:00
Michal Simek
461c388806 ARM: zynq: DT: Add reference to bus node
For adding OCM memory in platform DTS is necessary to have reference to
amba bus.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:24 +02:00
Michal Simek
e913ce2ad5 ARM: zynq: DT: Add pinctrl node
Add pinctrl node to DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:24 +02:00
Michal Simek
5ee236a3ea ARM: zynq: DT: Cleanup address-cells and size-cells
Remove unneeded address-cells form intc node because it is already setup
in parent node.
Add missing address-cells and size-cells to eth node to be shared for
every platform DTSes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:24 +02:00
Michal Simek
b346bd1d2d ARM: zynq: DT: Clean up timer device tree nodes
Separate IRQ cells from each other for easier reading.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:23 +02:00
Michal Simek
7e163363fb ARM: zynq: DT: Use the zynq binding with macb
Use the new zynq binding for macb ethernet, since it will disable half
duplex gigabit like the Zynq TRM says to do. Also allow the compatible
cadence gem binding that won't disable half duplex but works otherwise.

Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com>
Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:23 +02:00
Michal Simek
08305feb8e ARM: zynq: DT: Fix GEM register area size
The size of the GEM's register area is only 0x1000 bytes.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:22 +02:00
Michal Simek
40b383fa84 spi: Fix zynq SPI binding
Zynq is using Cadence IP where binding is documented in the Linux kernel
and there is no reason to use different binding.
Synchronize it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:22 +02:00
Michal Simek
3ffcdc7aaf ARM: zynq: DT: Remove 222 MHz OPP
Due to dependencies between timer and CPU frequency, only changes by
powers of two are allowed. The clocksource driver prevents other
changes, but with cpufreq and its governors it can result in being
spammed with error messages constantly. Hence, remove the 222 MHz OPP.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:22 +02:00
Michal Simek
8a8c46a65d ARM: zynq: DT: Migrate UART to Cadence binding
The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Michal Simek <michal.simek@xilinx.com>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:22 +02:00
Michal Simek
bece06ce0c ARM: zynq: DT: Add a fixed regulator for CPU voltage
To silence the warning
   cpufreq_cpu0: failed to get cpu0 regulator: -19
from the cpufreq driver regarding a missing regulator,
add a fixed regulator to the DT.
Zynq does not support voltage scaling and the CPU rail should always be
supplied with 1 V, hence it is added in the SOC-level dtsi.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:21 +02:00
Michal Simek
fb1a5061f0 ARM: zynq: DT: Add missing nodes to DTSI
Add ADC, CAN, GPIO, MC, DMA, DEVCFG, USB, Watchdog IPs to DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:21 +02:00
Michal Simek
a0cb47f1a1 ARM: zynq: DT: Use the right names for nodes
Based on SPEC you right names with addresses.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:21 +02:00
Michal Simek
225bf9aa65 zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting.
Add SLCR skeleton to enable run time checking.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Michal Simek
fb101168fa zynqmp: mp: Simplify set_r5_start handling
Pass directly boot_addr which is LOVEC (0) or HIVEC (0xffff0000).
No reason to use magic values 0 and 1.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Siva Durga Prasad Paladugu
b0d18beedb zynqmp: Provide option to enable uart dcc support for zynqmp
Provide option to enable uart dcc support for zynqmp
This config can be enabled as per board config file.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Siva Durga Prasad Paladugu
f994bdfe13 Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfig
Move CONFIG_SYS_TEXT_BASE of ZynqMP_ep to its
respective defconfig

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Siva Durga Prasad Paladugu
0b54a9dd09 zynqmp: Define ep config for ZynqMP
Define a new config "zynqmp_ep" for ZynqMP instead
of xilinx_zynqmp. This defconfig supports all emulation
platforms of ZynqMP. Also renamed TARGET_XILINX_ZYNQMP
to ARCH_ZYNQMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Siva Durga Prasad Paladugu
7558000721 zynqmp: Kconfig: Move zynqmp Kconfig
Move the zynqmp Kconfig from board to arch
as there may be different boards under same
architecture.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:19 +02:00
Michal Simek
e65d33cf03 zynq: gem: Setting up WRAP bit for one TX bd
Setting up WRAP bit to indicate that this is the last TX BD in the
chain.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:18 +02:00
Siva Durga Prasad Paladugu
eda9d3071b zynq: gem: Increase the Rx buffer descriptors to 32
Increase the Rx Buffer descriptors to 32. This will avoid
Rx buffer descriptors overflow if more packets were received
at one shot before we process the received ones.
This fixes the issue of intermittent timeouts during tftp
on a 1Gb connection with tftp server running on windows.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:18 +02:00
Siva Durga Prasad Paladugu
96f4f14964 zynqmp: gem: Flush the rx buffers while transmitting
Flush and invalidate the rx buffers while sending the
tx packet it self as armv8 does flush also while doing
invalidation.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:18 +02:00
Siva Durga Prasad Paladugu
8a584c8a7f zynqmp: gem: Set data bus width to 64bit for arm64
Set the data bus width to 64-bit AMBA Databus width in config register.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-07-28 11:56:18 +02:00
Tom Rini
26473945ad Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2015-07-25 09:04:18 -04:00
Hans de Goede
7f7409ba6a sunxi: Enable both ehci and otg in host mode on various boards
Now that the device-model port of the musb mode makes it possible, enable
both the ehci and otg in host mode on boards where the musb is wired up in
host only mode, either via an usb-a receptacle or via an usb <-> sata
converter.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
a51c832cc1 sunxi: ga10h: Enable both otg and regular usb host controllers
This allows using devices plugged into both ports of the tablet.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
9ecce9707b sunxi: musb: Stop treating not having a vbus-det gpio as an error
On some boards the otg is wired up in host-only mode in this case we
have no vbus-det gpio.

Stop logging an error from sunxi_usb_phy_vbus_detect() in this case, and
stop treating sunxi_usb_phy_vbus_detect() returning a negative errno, as
if a charger is plugged into the otg port.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
56a2085410 sunxi: musb: Improve output during probing
When we return an error the usb core will print an error-message, so in this
case do not print anything.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2015-07-25 11:22:55 +02:00
Hans de Goede
91183babea sunxi: musb: Use device-model for musb host mode
Modify the sunxi musb glue to use the device-model for musb host mode.

This allows using musb in host mode together with other host drivers
such as ehci / ohci, which is esp. useful on boards which use the
musb controller in host-only mode, these boards have e.g. an usb-a
receptacle or an usb to sata converter attached to the musb controller.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
d42faf3198 sunxi: musb: Move musb config and platdata to the sunxi-musb glue
Move the musb config and platdata to the sunxi-musb glue, which is where
it really belongs. This is preparation patch for adding device-model
support for the sunxi-musb-host code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
71cbe0d681 sunxi: musb: Add id pin support
When in host mode check if there is a host cable inserted into the otg
port by checking the id pin. If there is no host cable return an error to
make usb_lowlevel_init() exit early, rather then waiting for 1 second
for a device which will never show up.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:55 +02:00
Hans de Goede
b41972e7d1 sunxi: musb: Move vbus check to sunxi_musb_enable
This way it can be re-checked on "usb reset".

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:54 +02:00
Hans de Goede
48c06c98ec sunxi: usb-phy: Add support for reading otg id pin value
Add support for reading the id pin value of the otg connector to the usb
phy code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-07-25 11:22:54 +02:00
Hans de Goede
de1502c937 sunxi: Enable CMD_USB and USB_STORAGE by default on sunxi
Start using the new Kconfig options which are available for these now,
and simply always enable them by selecting them as sunxi builds always
include USB support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-25 11:22:54 +02:00
Tom Rini
4536882710 sunxi: Update selects in arch/arm/Kconfig for DM conversions
With certain features being convert to DM now we want sunxi to default
to having DM enabled for ETH/SERIAL and USB in some cases.

Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Tom Rini <trini@konsulko.com>
[hdegoede@redhat.com: Also select CONFIG_USB for all sunxi builds]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-07-25 11:22:54 +02:00
Hans de Goede
d08980de02 sunxi: Remove bogus uart entry from utoo-p66 dts file
At one point in time the utoo-p66 dts file in the kernel had a bogus
uart entry, and it seems like we synced with the kernel at just the wrong
moment.

This commit removes the bogus uart entry, which breaks booting the utoo-p66
when DM_SERIAL=y.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-25 11:22:54 +02:00
Tom Rini
6f4e050639 Merge git://git.denx.de/u-boot-usb 2015-07-24 16:39:56 -04:00
Rob Herring
58d6d139c3 usb: ci_udc: fix request allocation when endpoints are disabled
The ci_udc driver request allocation assumes that the endpoint descriptor
pointer is set to retrieve the endpoint number, but that is only true
when the endpoint is enabled. This results in a NULL ptr dereference
which for me happens to return 0 value. This causes the EP0 request
struct to be returned for other endpoints. Some gadget drivers like
fastboot and USB MS work fine, but ethernet does not.

Really, the ci_udc driver is the oddball here doing this EP0 special
case handling Stephen added. All the other drivers alloc/free functions
are pretty much the same with the only variation being the size of the
private struct. This could all be consolidated to a common function.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Stephen Warren <swarren@nvidia.com>
2015-07-24 22:08:38 +02:00
Daniel Kochmański
bf5b9b103c sunxi: spl: Remove redundant check from board_mmc_init for signature
Remove the boot signature check from board_mmc_init() in spl mode, as it
is already done in spl_boot_device() in this case, and update the comments
to reflect this.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Disable the check only for SPL instead of always]
Acked-by: Hans De Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:09 +02:00
Daniel Kochmański
a151403fd2 sunxi: spl: Detect at runtime where SPL was read from
Make possible using a single `u-boot-sunxi-with-spl.bin` binary for both NAND
memory and SD card. Detection where SPL was read from is implemented in
`spl_boot_device`.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Some small coding style fixes]
Acked-by: Hans De Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Daniel Kochmański
645c48f50e sunxi: Create helper function veryfing valid boot signature on MMC
This patch extracts checking for valid SD card "eGON.BT0" signature from
`board_mmc_init` into function `sunxi_mmc_has_egon_boot_signature`.

Buffer for mmc sector is allocated and freed at runtime. `panic` is
triggered on malloc failure.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Small bugfix to make it work for devs other then mmc0]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Daniel Kochmański
1b26bab12e mmc: Protect mmc_initialize from initialising mmc multiple times
`mmc_initialize` might be called multiple times leading to the mmc-controllers
being initialised twice, and initialising the `mmc_devices` list head twice
which may lead to memory leaks.

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
CC: Roy Spliet <r.spliet@ultimaker.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
CC: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-07-24 16:17:08 +02:00
Stefan Roese
5a9749ee12 arm: marvell: Increase MAXARGS to 32
This makes more complex U-Boot scripts possible.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-07-24 09:48:07 +02:00