Commit Graph

56120 Commits

Author SHA1 Message Date
Jagan Teki
bb3362b0ca arm: sunxi: Enable DM_MMC and DM_SCSI
- Enable DM_MMC if MMC defined
- Enable DM_SCSI if SCSI defined

globally through Allwinner platform, the effected SoC families
and boards will make use of MMC and SCSI subsystems in driver-model.

Tested DM_MMC in one board from A64, H6, H5, H3, R40, A83T, A20, A10
SoCs.

Tested-by: Pablo Sebastián Greco <pgreco@centosproject.org> # BPI-M2-Ultra
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
6c90036f7b ARM: dts: sun8i-r40-bananapi-m2-berry: Enable AHCI
Enable ahci node for BPI-M2-Berry, this would require since
we have DM_SCSI enabled on the respective SoC.

Unable to sync the same node from Linux, since the similar change
is still in Linux ML.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
36b53ab24e ARM: dts: a20-wits-pro-a20-dkt: Enable AHCI
Enable ahci node for a20-wits-pro-a20-dkt, this would require since
we have DM_SCSI enabled on the respective SoC.

Right now, ahci enabled in -u-boot.dtsi and will remove once same
supported by Linux.

Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
328c5f09c9 ARM: dts: a20-m5: Enable AHCI
Enable ahci node for sun7i-a20-m5.dts, this would require since
we have DM_SCSI enabled on the respective SoC.

No need to send patch to Linux for this change, since this
dts is U-Boot specific.

Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
cbb9cdc7aa board: sunxi: Add R40 sata compatible
Add sata compatible for R40.

Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
0cc47a8ead arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun7i-a20* sync:
"ARM: dts: sun7i: bananapi: Add GPIO banks regulators"
(sha1: 09c6572290f018d73ec2e812e28bada34d41815f)

Here are U-Boot specific dts changes.

- s/uart0_pins_a/uart0_pb_pins for
  sun7i-a20-ainol-aw1.dts
  sun7i-a20-m5.dts
  sun7i-a20-primo73.dts
  sun7i-a20-yones-toptech-bd1078.dts
  sunxi-itead-core-common.dtsi
- s/gmac_pins_mii_a/gmac_rgmii_pins for
  sun7i-a20-m5.dts
- drop i2c0, i2c1 pins from
  sunxi-itead-core-common.dtsi
- drop mmc0 pins from
  sun7i-a20-primo73.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
3705d4965f arm: allwinner: r40: Sync R40 dts(i) files from Linux 5.1-rc2
Sync sun8i-r40 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun8i-r40* sync:
"ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node"
(sha1: 1e5f1db4ccd8348a21da55bff82f4263000879ef)

Linux commit details about the sun8i-v40* sync:
"ARM: dts: sunxi: Fix I2C bus warnings"
(sha1: 0729b4af5753b65aa031f58c435da53dbbf56d19)

Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
99a8a3114f board: sunxi: gmac: Remove Ethernet clock and reset
Since Ethernet clock and reset is now handling via
CLK and RESET frameworks via driver API's remove
explicit ccm writes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
d3a2c0586e net: sun8i_emac: Add CLK and RESET support
Add CLK and RESET support for sun8i_emac driver to
enable TX clock and reset pins via CLK and RESET
framework.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
695f6043c9 net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandle
Unlike other Allwinner SoC's R40 GMAC clock control register
is locate in CCU, but rest located via syscon itself. Since
the phandle property for current code look for 'syscon' and
it will grab the respective ccu or syscon base address based
on DT property defined in respective SoC dtsi.

So, use the existing 'syscon' code even for R40 for retrieving
GMAC clock via CCU and update the register directly in
sun8i_emac_set_syscon instead of writing it separately using
ccm base.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
0ed8eaf1de net: sunxi_emac: Add CLK support
Add CLk support for sunxi_emac to enable AHB_EMAC clock
via CLK framework.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16 16:29:00 +05:30
Jagan Teki
33685372cf clk: sunxi: r40: Fix GMAC reset reg offset
GMAC reset reg offset added by below commit seems to assume
it as EMAC but R40 indeed using GMAC.
"clk: sunxi: Implement EMAC, GMAC clocks, resets"
(sha1: 68620c9698)

So, fix by updating the reg offset for RST_BUS_GMAC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:00 +05:30
Jagan Teki
a93a55044b arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux
Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.

But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.

Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)

Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)

Part of the sync initiated by 'Clément Péron'.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-14 22:32:32 +05:30
Tom Rini
216800acf1 Merge branch 'master' of git://git.denx.de/u-boot-spi
Conflicts:
	arch/arm/dts/armada-385-amc.dts
	arch/arm/dts/armada-xp-theadorable.dts
	arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-14 00:03:06 -04:00
Tom Rini
cf5eebeb18 fdtdec tests and improvements for carve-outs
pinctrl race-condition fix
 various other fixes in sandbox, sound, mkimage, etc.
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Merge tag 'pull-12apr19' of git://git.denx.de/u-boot-dm

fdtdec tests and improvements for carve-outs
pinctrl race-condition fix
various other fixes in sandbox, sound, mkimage, etc.
2019-04-13 08:27:35 -04:00
Tom Rini
0a5228be86 - mt76xx: add USB support, small fixes
- ath79: small fixes, add support for QCA9563 SoC and AP152 reference board
 - mscc: small fixes, add network support for JR2 and ServalT SoCs
 - bmips: small fixes, enable more drivers for ARM specific BCM6858 and BCM63158 SoCs
 - MIPS: fix redundant relocation of initrd images
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Merge tag 'mips-pull-2019-04-12' of git://git.denx.de/u-boot-mips

- mt76xx: add USB support, small fixes
- ath79: small fixes, add support for QCA9563 SoC and AP152 reference board
- mscc: small fixes, add network support for JR2 and ServalT SoCs
- bmips: small fixes, enable more drivers for ARM specific BCM6858 and BCM63158 SoCs
- MIPS: fix redundant relocation of initrd images
2019-04-13 08:27:26 -04:00
Tom Rini
015289580f stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
 - stm32mp1 dts files sync'ed with Linux version
 - add STM32MP1 Discovery boards (DK1 and DK2)
 - add STMFX gpio expander driver
 - misc improvement for stm3mp1 supports
 - rename stpmu1 to stpmic1 (official name)
 - stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
 - add STM32 FMC2 NAND flash controller driver
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Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot

stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
- stm32mp1 dts files sync'ed with Linux version
- add STM32MP1 Discovery boards (DK1 and DK2)
- add STMFX gpio expander driver
- misc improvement for stm3mp1 supports
- rename stpmu1 to stpmic1 (official name)
- stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
- add STM32 FMC2 NAND flash controller driver
2019-04-12 15:43:19 -04:00
Tom Rini
dd758c6720 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2019-04-12 15:43:08 -04:00
Tom Rini
683754f0aa Merge branch 'master' of git://git.denx.de/u-boot-i2c 2019-04-12 15:43:04 -04:00
Tom Rini
066cc7c6cf Merge git://git.denx.de/u-boot-marvell
- Misc dts files sync'ed with Linux version (Chris)
- Orion watchdog fix (Chris)
- kwbimage changed to also support Marvell bin_hdr binary (Chris)
- Add DM support to enable CONFIG_BLK for sata_mv (Stefan)
- Enable BLK on multiple platforms (Stefan)
- Misc minor fixes to AXP theadorable board (Stefan)
- Correct logic for DM_SCSI + unconverted drivers check (stefan)
- Misc changes to kirkwood to enable DM_USB here (Chris)
- Change ahci_mvebu to enable usage on A38x (Baruch)
- Update the kirkwood entry in git-mailrc (Baruch)
- Misc minor improvements (turris, documentation) (Baruch)
- Enhance sata_mv to support Kirkwood as well (Michael)
- Add wdt command (Michael)
- Add Marvell integrated CPUs (MSYS) support with DB-XC3-24G4XG
  board support (Chris)
2019-04-12 15:42:56 -04:00
Tom Rini
40a9546c7b Merge branch '2019-04-11-ti-master-imports'
- Improve Keystone 3 SoC support (DMA, TI SCI)
- Improve Keystone 2 SoC support (PHY fixes on various platforms)
- Improve am335x families (new platforms, more boot mode options in SPL
  via DM).
- General DaVinci, OMAP5 fixes.
2019-04-12 12:22:43 -04:00
Stefan Roese
c3b6c8e2d8 mips: mt76xx: linkit-smart-7688: Enable USB and FS support
This patch enables USB and file-system support on the LinkIt smart
MT7688 module for both, the normal and the RAM default config.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:53 +02:00
Stefan Roese
d7d7606c7e phy: Add USB PHY driver for the MT76x8 (7628/7688) SoC
This driver is derived from this Linux driver:
linux/drivers/phy/ralink/phy-ralink-usb.c

The driver sets up power and host mode, but also needs to configure PHY
registers for the MT7628 and MT7688.

I removed the reset controller handling for the USB host and device, as
it does not seem to be necessary right now. The soft reset bits for both
devices are enabled by default and testing has shown (with hackish
reset handling added), that USB related commands work identical with
or without the reset handling.

Please note that the resulting USB support is tested only very minimal.
I was able to detect one of my 3 currently available USB sticks.
Perhaps some further work is needed to fully support the EHCI controller
integrated in the MT76x8 SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:53 +02:00
Horatiu Vultur
484d15f32f configs: mscc_servalt: Add network support
Update default config to use network driver for ServalT SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:53 +02:00
Horatiu Vultur
da843eab1f net: mscc: servalt: Add ethernet nodes for ServalT
Add ethernet nodes for ServalT SoCs family. Currently there is only one
pcb(pcb116) in this family.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:53 +02:00
Horatiu Vultur
746f2d3e8b net: Add MSCC ServalT network driver.
Add network driver for Microsemi Ethernet switch.
It is present on ServalT SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:52 +02:00
Horatiu Vultur
b158e56f34 configs: vcoreiii: Change CONFIG_ENV_SIZE
Shrink the environment size for 3 reasons:

 - reading the environment it is slow, therefore having a smaller env
   improves the speed.
 - usually in the environment there are only few variables, therefore
   the enviromnent is almost empty.
 - because the same image can run on different boards which may have
   different flashes with different page sizes, the CONFIG_ENV_SECT_SIZE
   can't be change, it is set to least common multiple of the page sizes.

Adding this change improves the boot time. Before update for reading the
entire environment it took ~850 msec, after the change it takes ~40 msecs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Horatiu Vultur
27fc2f281c configs: mscc_jr2: Add network support
Update default confing to use network driver for Jaguar2 SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Horatiu Vultur
1141176163 net: mscc: jaguar2: Add ethenet nodes for Jaguar2.
Add ethernet nodes for Jaguar2 SoCs family. There are 3 pcb in this
family: pcb110, pcb111 and pcb112.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Horatiu Vultur
6aa50ae22c board: mscc: jr2: Update MSCC Jaguar2 boards
In Jaguar2 SoC family there are 3 different pcb. Each of this needs
to configure the phys in different ways. Therefore implement the
function board_phy_config and based on pcb configure them accordingly.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Horatiu Vultur
5e1d417bec net: Add MSCC Jaguar2 network driver.
Add network driver for Microsemi Ethernet switch.
It is present on Jaguar2 SoCs.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
d8c7ae7253 bcm963158: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm963158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
1e4a7c69fd dt: bcm963158: enable gpio controller
Enable all the gpio controllers in the device tree
of the board bcm963158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
938f10b7f6 dt: bcm63158: add gpio controller
Add 8 gpio controllers in the bcm63158 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
2629128572 gpio: do not include <asm/arch/gpio.h> on ARCH_BCM63158
As no gpio.h is defined for this architecture, to avoid
a compilation failure, do not include <asm/arch/gpio.h>
for arch bcm63158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
353496b756 gpio: bcm6345: allow this driver on ARCH_BCM63158
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm63158.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
185dc24c1c bcm968580xref: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm968580xref.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
396fff8da2 dt: bcm968580xref: enable gpio controller
Enable all the gpio controllers in the device tree
of the board bcm968580xref.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
9575c7ebc8 dt: bcm6858: add gpio controller
Add 8 gpio controllers in the bcm6858 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
d96e7ed802 gpio: do not include <asm/arch/gpio.h> on ARCH_BCM6858
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcm6858.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
14c9bd46e5 gpio: bcm6345: allow this driver on ARCH_BCM6858
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm6858.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
a8a33a53ba bcm968380gerg: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm968380gerg

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
f1ed3cfc53 dt: bcm968380gerg: enable gpio controller
Enable the gpio controllers in the device tree
of the board bcm968380gerg.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
ce171053a8 dt: bcm6838: add gpio controller
Add gpio controllers in bcm6838 device tree.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Philippe Reynes
ea0d6aa213 gpio: bcm6345: switch to raw I/O functions
This driver is used on several big endian mips board.
So we could use raw I/O function instead of forcing
big endian access.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:51 +02:00
Rosy Song
8426523af1 ag7xxx: add initial support for s17
S17 ethernet support is for QCA8337N, which used on
AP152 (QCA9563) board. It is a 7 ports GbE switch.

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2-v3:
   - add more commit message for s17

Changes for v4-v5:
   - coding style cleanup
2019-04-12 17:32:51 +02:00
Rosy Song
61290fb52c mips: add initial support for qca956x referenced board
QCA9563 is CPU used on AP152 board :

    Clock speed : 750 MHz ,
    Arch :  Mips 74Kc,
    Eth : SGMII interface,
    MIMO config : 3 * 3 450M,
    2 * USB 2.0,

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2:
   - coding style cleanup
   - remove ununsed flash chip in defconfig
   - enable automatic icache / dcache size in defconfig

Changes for v3:
   - add detailed information for qca956x in commit message

Changes for v4:
   - remove pre-configured network settings in ap152.h

Changes for v5:
   - coding style cleanup
2019-04-12 17:32:50 +02:00
Rosy Song
fda1bb0574 mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X
See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet,

   NFRAC[17:0]

So the mask of [17:5] is 0x1fff not 0x3fff.

Signed-off-by: Rosy Song <rosysong@rosinson.com>

Changes for v2-v3:
   - add more information for this commit

Changes for v4-v5:
   - coding style cleanup
2019-04-12 17:32:50 +02:00
Álvaro Fernández Rojas
e4f907e968 dma: bcm6348: check if driver is enabled before send/recv
This patch prevents errors when running tftpput.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2019-04-12 17:32:50 +02:00
Horatiu Vultur
cd424f35ee net: mscc: ocelot: Fix reset of the phys
The function mscc_miim_reset resets all the phys, but it is called for
each phy separetely. One consequence of this is that the boot time
is increased by 2 seconds.

The fix consists for calling the mscc_miim_reset function only once for
all phys.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-04-12 17:32:50 +02:00