Commit Graph

61832 Commits

Author SHA1 Message Date
Lukas Auer
b86f6d1e64 spl: opensbi: specify main hart as preferred boot hart
OpenSBI uses a relocation lottery to determine the hart to relocate
OpenSBI to its link address. In the U-Boot SPL boot flow, the main hart
schedules the secondary harts to enter OpenSBI before doing so itself.
One of the secondary harts will therefore always be the winner of the
relocation lottery. This is problematic if the link address ranges of
OpenSBI and U-Boot SPL overlap. OpenSBI will be relocated and therefore
overwrite U-Boot SPL while some harts may still run it, leading to code
corruption.

Avoid this problem by specifying the main hart as the preferred boot
hart to perform the OpenSBI relocation. The main hart will be the last
hart to enter OpenSBI, relocation can therefore occur safely.

The boot hart field was added to version 2 of the OpenSBI FW_DYNAMIC
info structure. The header file include/opensbi.h is synchronized with
include/sbi/fw_dynamic.h from the OpenSBI project to update the info
structure. The header file is recent as of commit
7a13beb21326 ("firmware: Add preferred boot HART field in struct
fw_dynamic_info").

Reported-by: Rick Chen <rick@andestech.com>
Suggested-by: Anup Patel <Anup.Patel@wdc.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-10 08:23:10 +08:00
Rick Chen
04883bf7ac doc: update AX25-AE350 RISC-V documentation
Add descriptions about U-Boot SPL feature and how to build and run.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
cca8b1e5b2 riscv: dts: Add #address-cells and #size-cells in nor node
Those are required for cfi-flash driver to get correct address information.
Also modify size description correctly.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
f05b6569a9 riscv: dts: Support four cores SMP
Add CPU2 and CPU3 information in cpus node
to support four cores SMP booting.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
444c46413f riscv: Fix clear bss loop in the start-up code
For RV64, it will use sd instruction to clear t0
register, and the increament will be 8 bytes. So
if the difference between__bss_strat and __bss_end
was not 8 bytes aligned, the clear bss loop will
overflow and acks like system hang.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
31dae22faa spl: cache: Allow cache drivers in SPL
When ax25-ae350 try to enable v5l2 cache
driver in SPL configuration, it need this
option for cache support in SPL.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
8ba595b6bd riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL
The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
43a0832ba0 riscv: andes_plic: Fix some wrong configurations
Fix two wrong settings of andes plic driver as below:

1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
   int can help to fix wrong plic enabling setting in RV64.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
7e24518c90 riscv: ax25-ae350: Use generic memory size setup
To get memory size from device tree instead of
get_ram_size(). This can avoid memory access fault
in U-Boot proper after PMP configurations in OpenSBI.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
cd61e86e6d riscv: ax25-ae350: add SPL configuration
This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.

With ae350_rv[32|64]_spl_defconfigs:

U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.

With ae350_rv[32|64]_spl_xip_defconfigs:

U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
ca06444aac riscv: ax25: add SPL support
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.

Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
2019-12-10 08:23:10 +08:00
Rick Chen
31fbf6032d Use dts support from U-Boot via OF_SEPARATE instead of depending from opensbi.
This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Rick Chen <rick@andestech.com>
2019-12-10 08:23:10 +08:00
Jagan Teki
b82a18549f riscv: dts: Add hifive-unleashed-a00 dts from Linux
Sync the hifive-unleashed-a00 dts from Linux with
below commit details:

commit <2993c9b04e616df0848b655d7202a707a70fc876> ("riscv: dts: HiFive
Unleashed: add default chosen/stdout-path")

Idea is to periodically sync the dts from Linux instead of
tweaking internal changes one after another, so better not
add any intermediate changes in between. This would help to
maintain the dts files easy and meaningful since we are
reusing device tree files from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-12-10 08:23:10 +08:00
Lukas Auer
6b20dc165e riscv: increase stack size to avoid a stack overflow during distro boot
This fixes a problem, where booting Linux using distro boot will
sometimes lead to an invalid instruction exception on the main hart. The
secondary harts are not affected and boot Linux successfully. The root
cause of this problem is a stack overflow on the main hart.

With distro boot, the current default stack size of 8KiB on RISC-V is
not sufficient and will cause a stack overflow. The stacks are allocated
sequentially. In the case of a stack overflow the stack of the main hart
can reach into that of another hart and be corrupted.

The stack overflow previously did not cause any problems, because only
stack frames, which are not used anymore since the hart enters Linux,
were corrupted. Starting with GCC 9, the stack usage has decreased. Now,
only the most recent stack frame overflows into the stack of a secondary
hart and is corrupted. The illegal instruction exception is caused by
the secondary hart overwriting the return address in the stack frame of
the main hart with an address that does not include valid code.

Increase the default stack size of each hart to 16KiB to avoid this
problem.

Reported-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Rick Chen <rick@andestech.com>
2019-12-10 08:23:10 +08:00
Heinrich Schuchardt
0c5c3f2935 arm: -march=armv5t for ARM11
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html

Commit 16540d07fd ("arm: fix -march for ARM11") changed the value of the
compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
ARM11.

The values prior to this patch were:

    arch-$(CONFIG_CPU_ARM1136)     =-march=armv5
    arch-$(CONFIG_CPU_ARM1176)     =-march=armv5t

The change lead to a regression with the Raspberry Pi Zero W not booting
anymore.

Use -march=armv5t both for ARM1136 and ARM1176.

Fixes: 16540d07fd ("arm: fix -march for ARM11")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Joris Offouga <offougajoris@gmail.com>
2019-12-09 10:36:00 -05:00
Heinrich Schuchardt
37db55b7e9 linux/types.h: fix typo unchar
unsigned char should be called uchar and not unchar.

This fixes a build error in lib/crypto/x509_cert_parser.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-12-09 10:35:30 -05:00
Tom Rini
2f02845817 Fixes for 2020.01
-----------------
 
 - imx8qxp_mek: increase buffer sizes and args number
 - Fixes for imx7ulp
 - imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
 - colibri_imx7: reserve DDR memory for Cortex-M4
 - vining2000: fixes and convert to ethernet DM
 - imx8m: fix rom version check to unbreak some B0 chips
 - tbs2910: Disable VxWorks image booting support
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl3uLqsPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3YEEL/jAKMnREGNHCjvwvxkVVZ7sWHeRtqh+OXb8V
 VnZB0glptth1NDxWyHFZkcsVqjpRlUsm3/lA91xaFXcUB8EWnJMKVReHkB7v0bZW
 zHziN0rNPoTBVocRlpgPXt3zeSOR3Qg+rFesg4zmlXNIVPyvBanpDCxXDK60gdIi
 JDrAdIarP0UMK0roIFLIyvnJ+J/ib1ky1aJI8cdktXb+nSyVrMw5VDdmSBtTCp10
 6o/fJGtWfzXp59a8y9XnnVxNsU2c0URcsswub4fvWhhwJ86xiWGSEfm5Sybql6kS
 6PYjB7jGmdWJjYug7rFthl1Hnn1FULIH9qrxPePtD2ooUUjHPlDmElQqWkHoVlib
 yUAlWG87ZdjhmEMR1iSFlkcBpOD7SlmcvfYZdeedCdtzTwW0kj6lcX9fUKHE+17e
 3SJQtPxpMrVfnUDRn0ciAbwg8+1Tow6sv39j6iYi7jAITny9q16ErdRGup0wB19Y
 tZkmRdnhtjCalrfDoEaRGXZJDE15XQ==
 =L2zo
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.01
-----------------

- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
2019-12-09 10:32:08 -05:00
Patrick Wildt
6a4b07e086 imx8m: fix rom version check to unbreak some B0 chips
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1.  A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20.  On
some B0 chips the value returned is 0x1020 instead of 0x20.  This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions.  There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision.  Thus remove the upper bits to fix the
regression.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-09 11:52:06 +01:00
Tom Rini
b38c3a641f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- 16-bit start up codes clean up
2019-12-08 10:51:00 -05:00
Masahiro Yamada
90ab311a7c x86: simplify ljmp to 32-bit code
You can directly specify the label as the operand for ljmp.

This commit saves 4-byte code.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the gas warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-08 19:10:21 +08:00
Masahiro Yamada
0d915a9aa4 x86: use data32 directive instead of macro for operand-size prefix
This file defines 'a32' and 'o32' macros to avoid magic numbers
of operand/address-size prefixing.

GAS supports 'data32' and 'addr32' for that purpose.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-08 19:10:12 +08:00
Tom Rini
d79ae6aa30 Merge branch '2019-12-06-master-imports'
- Allow for the sysboot command, which is used to parse extlinux.conf
  files to be used without PXE support.  There is no functional change
  here aside from fixing distro boot in a few cases where we actually
  lacked the ability to parse the extlinux.conf file
- Add the x509/pkcs7 parsers from Linux, a pre-requisite to EFI Secure
  Boot support.
2019-12-06 16:45:46 -05:00
Tom Rini
fb013eee68 Makefile: Ensure tools directory exists in output prior to use
With the change to make tools/version.h a file we need to make sure that
the output directory exists first otherwise we will get a build failure.

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Fixes: 4d90f6cd98 ("tools: Avoid creating symbolic links for tools/version.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-12-06 16:45:32 -05:00
AKASHI Takahiro
f523400f60 test: add asn1 unit test
This test will exercise asn1 compiler as well as asn1 decoder functions
via various parsers.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
e85a787c7d lib: crypto: add pkcs7 message parser
Imported from linux kernel v5.3:
 pkcs7.asn1 without changes
 pkcs7.h with changes marked as __UBOOT__
 pkcs7_parser.h without changes
 pkcs7_parser.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
b4adf627d5 lib: crypto: add x509 parser
Imported from linux kernel v5.3:
 x509.asn1 without changes
 x509_akid.asn1 without changes
 x509_parser.h without changes
 x509_cert_parser.c with changes marked as __UBOOT__
 x509_public_key.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
9b933bf6f4 lib: crypto: add rsa public key parser
Imported from linux kernel v5.3:
rsapubkey.asn1 without changes
rsa.h without changes
rsa_helper.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
c4e961ecec lib: crypto: add public key utility
Imported from linux kernel v5.3:
 asymmetric-type.h with changes marked as __UBOOT__
 asymmetric_type.c with changes marked as __UBOOT__
 public_key.h with changes marked as __UBOOT__
 public_key.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
a9b45e6e83 lib: add oid registry utility
Imported from linux kernel v5.3:
 build_OID_registry without changes
 oid_registry.h without changes
 oid_registry.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
e2c04fafc8 doc: add README for asn1 compiler and decoder
This document gives a brief description about ASN1 compiler as well as
ASN1 decoder.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
ab8a0e069d lib: add asn1 decoder
Imported from linux kernel v5.3:
 lib/asn1_decoder.c with changes marked as __UBOOT__

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
ed3dead9b7 Makefile: add build script for asn1 parsers
This rule will be used to build x509 and pkcs7 parsers.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
2b12196dc1 cmd: add asn1_compiler
Imported from linux kernel v5.3:
 asn1.h without changes
 asn1_ber_bytecode.h without changes
 asn1_decoder.h without changes
 asn1_compiler.c without changes

This host command will be used to create a ASN1 parser, for example,
for pkcs7 messages or x509 certificates. More specifically, it will
generate *byte code* which will be interpreted by asn1 decoder library.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-12-06 16:44:20 -05:00
AKASHI Takahiro
bd3c3dd7fb linux/time.h: include vsprintf.h
Without this commit, time.h possibly causes a build error as
asctime_r() uses sprintf().

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:19 -05:00
AKASHI Takahiro
29852bfc22 include: kernel.h: include printk.h
Adding "printk.h" will help improve portability from linux kernel
code (in my case, lib/asn1_decoder.c and others) where printf and
pr_* variant functions are used.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:19 -05:00
AKASHI Takahiro
1872311727 lib: add mktime64() for linux compatibility
This function will be used  in lib/crypto/x509_cert_parser.c, which
will also be imported from linux code in a later commit.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:19 -05:00
AKASHI Takahiro
05429b6cf5 rtc: move date.c from drivers/rtc/ to lib/
In the next commit, rtc_mktime(), for compatibility with linux, will be
implemented using rtc_mktime(), which is no longer drivers/rtc specific.
So move this file under lib/.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:19 -05:00
AKASHI Takahiro
09030e0361 rtc.h: add struct udevice declaration
Without this change, including rtc.h solely will cause a build error.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2019-12-06 16:44:19 -05:00
AKASHI Takahiro
4839e86892 linux_compat: move kmemdup() from ubifs.c to linux_compat.c
linux_compat.c is the best place for kmemdup(), which is currenly used
only in ubifs.c, but will also be used when other kernel files
(in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be
imported. So just move it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-12-06 16:44:19 -05:00
Patrice Chotard
31839dc2d2 cmd: pxe: Fix checkpatch WARNING/CHECK
Fix checkpatch WARNING and CHECK issues

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:19 -05:00
Patrice Chotard
51843eaba6 cmd: sysboot: Fix checkpatch WARNING/CHECK
Fix checkpatch WARNING and CHECK issues

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:19 -05:00
Patrice Chotard
8cb22a66a7 cmd: pxe_utils: Fix checkpatch WARNING/CHECK
Fix checkpatch WARNING and CHECK issues

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:19 -05:00
Patrice Chotard
993c912d30 cmd: sysboot: Create a sysboot command dedicated file
Extract all sysboot command related code from pxe.c to new sysboot.c
Update Kconfig to insure that DISTRO_DEFAULT select new CMD_SYSBOOT
command.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:18 -05:00
Patrice Chotard
2373cba3d2 cmd: Prepare sysboot command independence
As sysboot and pxe commands are sharing piece of code, migrate this
common code into a new file pxe_utils.c to prepare sysboot command
code extraction from pxe.c

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:18 -05:00
Patrice Chotard
1ac2cb9741 cmd: Migrate from_env() from pxe.c to nvedit.c
Migrate from_env() from pxe.c to nvedit.c as it's not pxe specific.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-12-06 16:44:18 -05:00
Tom Rini
bead4f2f2c Merge tag 'u-boot-rockchip-20191206' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs
2019-12-06 10:35:18 -05:00
Tom Rini
edbb8e0918 Revert "spl: fix entry_point equal to load_addr"
Due to the (seemingly bogus) assumption of a default
CONFIG_SYS_UBOOT_START value we will revert this change for now and
evaluate it again for the next release along with changes to
CONFIG_SYS_UBOOT_START.

This reverts commit d3e97b53c1.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-06 09:56:03 -05:00
Anatolij Gustschin
5c1c7c1ef8 imx: imx8qxp_mek: increase buffer sizes and args number
The default value of CONFIG_SYS_CBSIZE is too small when we need
to input long commands or when using long kernel command line.

The default value of CONFIG_SYS_MAXARGS is too small to add a long
command line, and the kernel might not boot as intended without the
complete bootargs. Increase argument buffer sizes and the number of
arguments.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-12-06 13:57:42 +01:00
Frieder Schrempf
f5edb0d86d clk: imx: imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
The 24MHz oscillator clock is referenced by "clock-osc-24m" and not
"osc_24m".

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-12-06 13:57:42 +01:00
Marek Vasut
ed22a88385 ARM: imx: vining2000: Align SOC and ARM LDO voltages
The board has both VDD_SOC_IN and VDD_ARM_IN rails connected to the same
PMIC rail, align the LDO voltages to avoid leaking inside the MX6SX SoC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00