Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>
Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.
Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.
Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.
It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().
In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add show_qrio function to print chip id and revision information.
There are already multiple QRIO chip versions available and the upcoming
designs may want to show used version.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.
Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.
We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.
This might leave a hole if there is no ethernet1 alias. This is
intended.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
## Executing script at 80000000
load - load binary file from a filesystemUsage:
load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
- Load binary file filename from partition part on device
type interface instance dev to address addr in memory.
bytes gives the size to load in bytes.
If bytes is 0 or omitted, the file is read until the end.
pos gives the file byte position to start reading from.
If pos is 0 or omitted, the file is read from the start.
...
Bad Linux ARM64 Image magic!
SCRIPT FAILED: continuing...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.
Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.
Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.
Circumvent that by not disabling the write protection in the first
place.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.
Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.
For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/
Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.
This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.
Reported-by: Thorsten Spille <thorsten_spille@netcor.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
While the SPI controller speed is defined by DTS, the maximum
slave speed (connected devices) is limited by the pre-defined
configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz
This patch increases this maximum SPI slave device speed to 40MHz
Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59516
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Testing has shown, that the quality of the PCIe signals and also the
stability of correct link establishment on the 2 PCIe ports is better,
when the deemphasis bit is set in the PCIe config register.
This needs to be done very early, even before the SERDES setup code is
run. This way, the first link will already be established with this
setup.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the board specific "pcie" U-Boot command to not only
check for PCIe device existance but also for the correct link speed
and width that has been established. This cmd can be used by U-Boot
scripts for automated testing, if the PCIe setup is correct. Meaning,
that all PCIe devices are correctly detected and the link speed and
width is corrent.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch changes the PCI config routines in the Armada XP / 38x driver
to not allow access to the PCIe root ports.
While updating the Armada XP based theadorable to the latest mainline
and testing it with the DM PCI driver I noticed, that the PCI root
bridge was being configured incorrectly. Resulting in the PCIe Intel
WiFi was not working correctly in Linux. With this patch applied, all
PCIe devices work without any issues in Linux again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: Mario Six <mario.six@gdsys.cc>
On Espressobin board are MAC addresses stored in U-Boot env area. Therefore
they are not present in default_environment[] array constructed at compile
time.
This change puts permanent MAC addresses into default_environment[] array
at board runtime. Espressobin board has enabled DEFAULT_ENV_IS_RW option
and therefore can modify this array.
This change ensure that 'env default -a' does not delete permanent MAC
addresses from Espressobin env storage area.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
On Espressobin board value for $fdtfile cannot be determined at compile
time and is calculated at board runtime code. This change uses a new option
DEFAULT_ENV_IS_RW to allow modifying default_environment[] array at runtime
and set into it correct value.
This change also ensure that 'env default -a' set correct value to $fdtfile.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
This change allows board code to modify default_environment[] array when
compile option DEFAULT_ENV_IS_RW is specified in board config file.
Some board default variables depend on runtime configuration which is not
known at compile time. Therefore allow to set default_environment[] array
as non-const and allow board code to modify it when it is needed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Andre Heider <a.heider@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also
known as the RZ/G2H.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M and RZ/G2N dev kits.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also
known as the RZ/G2N.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi. It shares much of the same design as
the RZ/G2M dev kit.
Signed-off-by: Adam Ford <aford173@gmail.com>
The versaclock doesn't have a driver yet, but there are a bunch
of device tree updates for the Beacon RZ/G2 boards that won't
compile without these. A driver is coming, so sync the bindings
for now
Signed-off-by: Adam Ford <aford173@gmail.com>
In case MMC has MBR system and fastboot writes GPT,
MMC is still recognized as MBR.
Invoke part_init() to purge cached data and update
information about partition table type.
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Add command oem bootbus which executes the command
``mmc bootbus <id> <arg>`` on the current fastboot mmc device
(<i> = CONFIG_FASTBOOT_FLASH_MMC_DEV) to set the eMMC boot
configuration on first update, with
<arg> = boot_bus_width reset_boot_bus_width boot_mode
$> fastboot oem bootbus:<boot_bus_width> <reset_boot_bus_width> <boot_mode>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add fastboot command oem partconf which executes the command
``mmc partconf <id> <arg> 0`` on the current <id> mmc device
to configure the eMMC boot partition with
<arg>: boot_ack boot_partition, so the command is:
$> fastboot oem partconf:<boot_ack> <boot_partition>
The partition_access argument is forced to 0 (userdata)
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[lukma - Kconfig adjustments after merging this patch]
Update the code and the configs for eMMC boot and userdata
partitions acces
- FASTBOOT_MMC_BOOT_SUPPORT: boot partition 1 and 2 (erase/write)
- FASTBOOT_MMC_BOOT1_NAME: boot partition 1, default name="mmc0boot0"
- FASTBOOT_MMC_BOOT2_NAME: boot partition 2, default name="mmc0boot1"
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Split userdata and boot partition support for eMMC update
and correct the description (update is supported).
The new configuration CONFIG_FASTBOOT_MMC_USER_SUPPORT
allows to activate support of userdata partition update,
based on target name=CONFIG_FASTBOOT_MMC_USER_NAME
This patch also removes the unnecessary dependency with
ARCH_MEDIATEK and EFI_PARTITION.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
It is possible to implement fastboot_set_reboot_flag in a generic way
if BCB commands are turned on for a target. Using
bcb_set_reboot_reason allows to do this by simply passing string with
correct reboot reason that should be handled during next boot process.
If BCB are turned off, then bcb_set_reboot_reason would simply return
error, so it won't introduce any new behaviour for such targets.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
This reverts commit 0ebf9842e5.
Current generic implementation of fastboot_set_reboot_flag is somewhat
messy and requires some additional configuration option to be enabled
besides CMD_BCB, so it reverts that implementtion in order to bring a
new cleaner one.
Next commit introduces new generic implementation of
fastboot_set_reboot_flag.
Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
- introduces some standard sysinfo options as a source, e.g. to read
strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
support the build system adding information after U-Boot is built
While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.
The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.
Add some standard sysinfo options for this, and use them to obtain the
required information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These ops are missing at present which is not permitted. Add an empty
operation struct.
Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.
Fix it by moving the #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.
Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.
Provide a function to update the version string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
