ARM: rmobile: Add Beacon EmbeddedWorks RZG2N Dev Kit

The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also
known as the RZ/G2N.

The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.  It shares much of the same design as
the RZ/G2M dev kit.

Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford 2021-02-03 06:57:19 -06:00 committed by Marek Vasut
parent 2b6cf2e94d
commit 6001b49920
7 changed files with 179 additions and 1 deletions

View File

@ -809,6 +809,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774b1-beacon-rzg2n-kit.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \

View File

@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020 Compass Electronics Group, LLC
*/
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&cpg {
u-boot,dm-pre-reloc;
};
&extal_clk {
u-boot,dm-pre-reloc;
};
&prr {
u-boot,dm-pre-reloc;
};
&extalr_clk {
u-boot,dm-pre-reloc;
};
&sdhi0 {
/delete-property/ cd-gpios;
};
&sdhi2 {
status = "disabled";
};

View File

@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Compass Electronics Group, LLC
*/
/dts-v1/;
#include "r8a774b1.dtsi"
#include "beacon-renesom-som.dtsi"
#include "beacon-renesom-baseboard.dtsi"
/ {
model = "Beacon Embedded Works RZ/G2N Development Kit";
compatible = "beacon,beacon-rzg2n", "renesas,r8a774b1";
aliases {
serial0 = &scif2;
serial1 = &hscif0;
serial2 = &hscif1;
serial3 = &scif0;
serial4 = &hscif2;
serial5 = &scif5;
serial6 = &scif4;
ethernet0 = &avb;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.3",
"dclkin.0", "dclkin.1", "dclkin.3";
};
/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&versaclock6_bb 4>, <&audio_clk_b>,
<&audio_clk_c>,
<&cpg CPG_CORE R8A774B1_CLK_S0D4>;
};

View File

@ -65,6 +65,11 @@ config TARGET_BEACON_RZG2M
select R8A774A1
select PINCTRL_PFC_R8A774A1
config TARGET_BEACON_RZG2N
bool "Beacon EmbeddedWorks RZ/G2N Dev Kit"
select R8A774B1
select PINCTRL_PFC_R8A774B1
config TARGET_CONDOR
bool "Condor board"
imply R8A77980

View File

@ -1,4 +1,4 @@
if TARGET_BEACON_RZG2M
if TARGET_BEACON_RZG2M || TARGET_BEACON_RZG2N
config SYS_SOC
default "rmobile"

View File

@ -4,3 +4,4 @@ S: Maintained
F: board/beacon/beacon-rzg2m/
F: include/configs/beacon-rzg2m.h
F: configs/r8a774a1_beacon_defconfig
F: configs/r8a774b1_beacon_defconfig

View File

@ -0,0 +1,71 @@
CONFIG_ARM=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
CONFIG_RCAR_GEN3=y
CONFIG_R8A774B1=y
CONFIG_TARGET_BEACON_RZG2N=y
# CONFIG_SPL is not set
CONFIG_DEFAULT_DEVICE_TREE="r8a774b1-beacon-rzg2n-kit"
CONFIG_FIT=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_DEFAULT_FDT_FILE="r8a774b1-beacon-rzg2n-kit.dtb"
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_SYS_MMC_ENV_PART=2
CONFIG_VERSION_VARIABLE=y
CONFIG_REGMAP=y
CONFIG_SYSCON=y
CONFIG_CLK=y
CONFIG_CLK_RENESAS=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_PCA953X=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_MMC=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_RENESAS_SDHI=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
CONFIG_BITBANGMII=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_RENESAS_RAVB=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_SCIF_CONSOLE=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_RENESAS_RPC_SPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_OF_LIBFDT_OVERLAY=y