Commit Graph

53533 Commits

Author SHA1 Message Date
Vipul Kumar
9a7799f4f4 net: zynq_gem: Added 64-bit addressing support
This patch adds 64-bit addressing support for zynq gem.
This means it can perform send and receive operations on
64-bit address buffers.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2018-12-03 16:22:01 +01:00
T Karthik Reddy
332d185c37 arm64: zynqmp: Add new header file for zcu104 RevC
Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
	CONFIG_ZYNQ_GEM_EEPROM_ADDR
	CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-12-03 15:21:56 +01:00
Michal Simek
ebcc1a223e arm64: zynqmp: Wire mini-emmc1 configuration with zcu102
For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)

Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff170000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
f5ed777d29 arm64: zynqmp: Wire mini-emmc0 configuration with zcu100
For testing purpose use zcu100 which has SD at controller 0 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100)

Model: ZynqMP MINI EMMC0
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff160000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
e615f39e7f arm64: zynqmp: Start usb ethernet gadget automatically
If only usb ethernet gadget is enabled it can start automatically.
If more gagdets are enabled usb ethernet gadget can be bind by
"bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
ee97a9996a arm64: zynqmp: Add mini mtest configuration
This configuration is useful when you want to run small u-boot and
perform DDR memory test to make sure that DDR is properly configured.
It is use for board bringup because alternative u-boot memory tests is
quite good.
Configuration is running out of OCM.

As is done for others mini configurations 0x80 bytes for variables is
enough and only default variables are stored there.

Alternative memtest is enabled and also 2GB of DDR via DTS files.
Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init()
from zcu102 for testing purpose.
In case of size issue this can be moved to SPL configuration as is done
for mini_qspi configuration but it is not a problem now.

Log:
U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100)

Model: ZynqMP MINI
Board: Xilinx ZynqMP
DRAM:  WARNING: Initializing TCM overwrites TCM content
2 GiB
EL Level:       EL3
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
8cf1a6e83b arm64: zynqmp: Use minimal size for environment variables
There is no reason to have huge space for variables because none is
using that. But there are some which are setup automatically.

baudrate=115200
fdtcontroladdr=ffffa0d0
stderr=dcc
stdin=dcc
stdout=dcc

Environment size: 72/124 bytes

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
1eebaef201 arm64: zynqmp: Do not save variables about board
No reason to save this data to environment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:25 +01:00
Michal Simek
8cec93232c arm64: zynqmp: Do not use any EXTRA_ENV_SETTINGS
No reason to save additional variables to environment for mini
configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:28:05 +01:00
Michal Simek
a2292665a4 arm64: zynqmp: Disable BOOTCOMMAND
There is no need to waste a space for setting up bootcommand which is
passed via xilinx_zynqmp.h by including "config_distro_bootcmd.h"
header.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:27:57 +01:00
Michal Simek
a837cfe5b2 arm64: zynqmp: Enable SPL for mini qspi configuration
Wire up mini_qspi SPL with zcu102 for testing purpose.
Normally mini u-boot runs with FSBL/SPL for certain board.
Enabling SPL and configuration from zcu102 helps with testing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:13:57 +01:00
Michal Simek
e22687c190 arm64: zynqmp: Disable autoboot feature for mini
There is no reason to have autoboot enabled because it should never
start anything automatically.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:11:47 +01:00
Michal Simek
e27e6eb6f9 ARM: zynq: Disable net for cse nor/nand
There is no need to waste 6k if none needs it.

zynq_cse_nand  : all -6486 bss -20 data -136 rodata -606 text -5724
zynq_cse_nor   : all -6486 bss -20 data -136 rodata -606 text -5724

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:36:49 +01:00
Michal Simek
2b4367dfee ARM: zynq: Enable mtest command at least on one platform
mtest is being checked by test/py framework and this test should run at
least on one platform that's why enabling mtest on zc702.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:32:31 +01:00
Michal Simek
fdba86972f ARM: zynq: Wire SPL configuration for cse nor/nand targets
These symlinks are here only for testing purpose where SPL is used
for soc configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:31:02 +01:00
Michal Simek
6bd13ee94e arm64: zynqmp: Setup clock-output-names for si570 chips
If there are more instances of si570 clock-output-names property
should be used for differentiation of clock output.
The patch is adding this optional properties for all zynqmp boards with
si570 chip.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:30:02 +01:00
Michal Simek
8418d2deb8 arm64: zynqmp: Disable ltc2952 poweroff chip
This chip is on the board but handling should be done via firmware not
via Linux driver. Changing status property to keep it in the tree to
describe it instead of removing this node completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:30:02 +01:00
Michal Simek
d1fb3d024e arm64: zynqmp: Fix sdhci clock in emmc0 mini configuration
Add missing clocks property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:30:02 +01:00
Michal Simek
0ed45f0025 arm64: zynqmp: Wire spi-flash compatible string with flashes
Enable reading tx and rx buswidth from DT via spi-uclass.
To get these from uclass spi-flash compatible string has to be added
to flash node.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:30:02 +01:00
Siva Durga Prasad Paladugu
9cd26aaf39 arm64: zynqmp: Define and enable qspi node for DC4 board
DC4 board has qspi on it hence define and enable
qspi node for it.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:29:58 +01:00
Michal Simek
850e7795cd arm64: zynqmp: Enable SPL_SEPARATE_BSS by default
BSS section was all the time separated for SPL but this symbol wasn't
enabled. It is necessary to have it enabled for OF_SEPARATE
configuration where DTB is appended to u-boot with DTB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
12ef7e22ec microblaze: Showing model information from DT by default
Show information about board read from DT by default to know what board
U-Boot is running at.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
656185a5d7 microblaze: Use standard functions for memory decoding
The standard function is less error prone than custom one.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
f3289d1f0e arm64: zynqmp: Reflect emmc controller ID in model in DT
Make sense to add controller ID to model name to have it visible through
the logs to know which controller is used by which configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
09a4c91b66 arm64: zynqmp: Disable bootelf and fdt commands for mini configurations
There is no reason to enable these commands for mini configurations.
It saves some space:
   aarch64: (for 2/2 boards) all -19076.0 bss -1048.0 data -1720.0
rodata -3840.0 text -12468.0
            xilinx_zynqmp_mini_emmc1: all -19076 bss -1048 data -1720
rodata -3840 text -12468
            xilinx_zynqmp_mini_emmc0: all -19076 bss -1048 data -1720
rodata -3840 text -12468

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
b76a37e9a9 ARM: zynq: cse: Shrink u-boot size
U-Boot is growing that's why not needed features can be disabled:
- CMDLINE_EDITING
- AUTO_COMPLETE
- SYS_LONGHELP

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
a204ac71d2 ARM: zynq: cse: Disable autoboot feature
Intention of CSE targets is not boot anything that's why also bootdelay
is not necessary

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
f4653350ba ARM: zynq: cse: Disable distro bootcommands
cse targets shouldn't never have distro default enabled because these
targets are not designed for booting images.

It was enabled by:
"configs: Re-sync with CONFIG_DISTRO_DEFAULTS"
(sha1: fa2c14676c)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
0dc69f4193 ARM: zynq: Guard zynq_help_text with CONFIG_SYS_LONGHELP
If SYS_LONGHELP is disabled the following warning is generated:
board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but
not used [-Wunused-variable]

Normal way for fixing this is to guard the whole variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Martin Lund
1cefca71d2 mtd: nand: Arasan: Add subpage configuration support
Add support for disabling subpage write support via
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE.

Currently the Linux Arasan driver does not support subpage writes and in
case of running UBI and accessing the same UBI volume from both U-Boot
and Linux it is required to have the same subpage write configuration
else the location of the UBI headers (EC + VID) will be misaligned
(subpage vs page) and incompatible. Hence the need for disabling
subpage write support in the U-Boot Arasan NAND driver.

Signed-off-by: Martin Lund <malu@gomspace.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Siva Durga Prasad Paladugu
c25e804dd8 arm: zynq: cse_qspi: Fix overwriting spi-rx-bus-width property
spi-rx-bus-width property is part of flash, so it should be moved
to flash node from qspi node. This patch fixes the incorrect read
of spi-rx-bus-width property by moving it to flash node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Siva Durga Prasad Paladugu
5473f245d0 arm64: zynqmp: Fix logic in CG/EG/EV detection
The VCU disable bit(8) in IP disable register of efuse
is valid only if PL powered up and hence PL powerup status
has to be considered while determining the CG part also.
This patch considers the PL powerup status and ignores the VCU
disable bit if PL not powered up.
This fixes the issue of "unknown" id for CG parts if PL not powered up
and VCU bit(8) is not set.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Michal Simek
23374a97fd arm64: zynqmp: Enable SPL gzip support for zcu102 and zcu100
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00
Tom Rini
5830791d91 Various minor sandbox improvements
Better buildman warning handling
 Misc other things
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Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm

Various minor sandbox improvements
Better buildman warning handling
Misc other things
2018-11-23 17:25:27 -05:00
Simon Glass
a58986ca8b sf: Add a method to obtain the block-protect setting
It is useful to obtain the block-protect setting of the SPI flash, so we
know whether it is fully open or (perhaps partially) write-protected. Add
a method for this. Update the sandbox driver to process this operation and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
f9d49f92f8 test: sf: Add a simple SPI flash test
The current test is a functional test, covering all the way from the
command line to the sandbox SPI driver. This is useful, but it is easier
to diagnose failures with a smaller test.

Add a simple test which reads and writes data and checks that it is stored
and retrieved correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
8729b1ae2c misc: Update read() and write() methods to return bytes xfered
At present these functions return 0 on success. For some devices we want
to know how many bytes were transferred. It seems useful to adjust the API
to be more like the POSIX read() and write() functions.

Update these two methods, a test and all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-20 19:14:22 -07:00
Simon Glass
96794a3eae string: Include the config header
At present the config header is not included in this file, but it does use
a CONFIG option. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
b9f210a35c video: Update video_set_default_colors() to support invert
It is useful to be able to invert the colours in some cases so that the
text matches the background colour. Add a parameter to the function to
support this.

It is strange that function takes a private data structure from another
driver as an argument. It seems better to pass the device and have the
function internally work out how to find its required information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
4b6dbaa307 binman: Set the pathname correctly for ELF files
At present, stripped files don't have the right pathname which means that
blob compression cannot be used. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
26cc8fccc6 binman: Drop an unnecessary comma in blob handling
This comma is not needed. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
a3c005506a binman: Add a way to enable debugging from the build
When the build fails due to something wrong in binman it is sometimes
useful to get a full backtrace showing the location of the failure. Add
a BINMAN_DEBUG environment variable to support this along with some
documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
048c6e8956 spl: lz4: Allow use of lz4 compression in SPL
In some cases U-Boot is compressed and it is useful to be able to
decompress it in SPL. Add a Kconfig and Makefile change to allow this.
Note that this does not actually implement decompression.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
c0126bd862 spl: Support bootstage, log, hash and early malloc in TPL
At present these features are supported in SPL but not TPL. Update the
Kconfig and Makefile to allow this.

Also add a few Makefile comments to make earier to track what is going on.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
4a5b5e1a46 sandbox: Update some drivers to work in SPL/TPL
At present sandbox drivers are mostly not used before relocation. Some of
these are needed by Chromium OS verified boot, since it uses sandbox TPL,
so update them accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
a2a63a35b2 sandbox: cros_ec: exynos: Drop use of cros_ec_get_error()
This function is really just a call to uclass_get_device() and there is no
reason why the caller cannot do it. Update sandbox and snow accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
2018-11-20 19:14:22 -07:00
Simon Glass
566bf3a869 sandbox: Add a function to read a host file
Add a way to read a file from the host filesystem. This can be useful for
reading test data, for example. Also fix up the writing function which was
not the right version, and drop the debugging lines.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
a5c13b68e7 sandbox: log: Add a category for sandbox
It seems useful to make sandbox its own log category since it is used for
so much testing. Add this as a new category.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
04488c4d15 sandbox: tpm: Allow debugging of data packages
This is not normally useful, so change the code to avoid writing out every
data package. This can be enabled with #define DEBUG.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Simon Glass
72ef8bfd6d cros_ec: Add new features for events and power
This adds new commands to the EC related to setting and clearing events
as well as controlling power-related settings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00