This patch to enable configs for usb module
- xhci
- ehci
- usb storage
- usb net
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Squashed in patch to move to Kconfig:
https://patchwork.ozlabs.org/patch/672543/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Select DM_USB to compatible with USB DM driver model.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
We do some SoC level one time setting initialization in
arch_cpu_init.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
We consider the grf setting for pwm controller select as the system
operation instead of driver operation, move it to soc init, let's
remove it from pwm driver first.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch use clock API instead of hardcode for get pwm clock.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix printf() to debug() nit:
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a condition to determine the rk3288_sdram_channel size.
This patch fixes read sdram_channel property failed from DT on rk3288
boards, which not enable OF_PLATDATA.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
This patch add pinctrl for sdcard which may not be initialized before
uboot.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is no interrupt line for each PWM which used by pinctrl to get the
periph_id, so it's not able to enable the default pinctrl setting by pinctrl
framework, let's enable it at board_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch enable rk3399 pinctrl driver and gpio driver which is sub-node
of pinctrl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
pmugrf is a module like grf which contain some of the iomux registers
and other registers.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
There are a few boards that use CONFIG_ISO_STRING as part of a sanity
check during firmware update at run time. Move this string to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config
There are two boards, MIP405 and MIP405T that have a few differences.
Start by checking for CONFIG_TARGET_MIP405. Then introduce
CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T. Next, convert
also convert the usage of CONFIG_ISO_STRING to be based on Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the config IDENT_STRING to Kconfig and migrate all boards
[sivadur: Migrate zynq boards]
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
This reverts commit 90c08d9e08.
I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much. 8KB memory for SPL is
actually too big for some boards. Perhaps 0x800 is enough, but the
situation varies board by board.
Let's postpone our decision until we come up with a better idea.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a way to find the byte offset of a property within the device tree. This
is only supported with the normal libfdt implementation since fdtget does
not provide this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
After any node/property deletion the device tree can be packed to remove
spare space. Add a way to perform this operation.
Note that for fdt_fallback, fdtput automatically packs the device tree after
deletion, so no action is required here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for deleting a device tree property. With the fallback
implementation this uses fdtput. With libfdt it uses the API call and
updates the offsets afterwards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we want to be able to change the in-memory device tree using libfdt,
use a bytearray instead of a string. This makes interfacing from Python
easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
For binman we need to support deleting properties in the device tree. This
will change the offsets of nodes after the deletion. In preparation, add
code to keep track of when the offsets are invalid, and regenerate them.
Signed-off-by: Simon Glass <sjg@chromium.org>
If a source device tree is provide to the Fdt() constructors, compile it
automatically. This will be used in tests, where we want to build a
particular test .dts file and check that it works correctly in binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
When tools want to display information of varying levels of importance, it
helps to provide the user with control over the verbosity of these messages.
Progress messages work best if they are displayed and then removed from the
display when no-longer relevant.
Add a new tout library (terminal out) to handle these tasks.
Signed-off-by: Simon Glass <sjg@chromium.org>
For tools which want to use input files and temporary output, it is useful
to have the handling of these dealt with in one place. Add a new library
which allows input files to be read, and output files to be written, all
based on a common directory structure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some functions have the same code in the subclasses. Move these into the
superclass to avoid duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions are identical in both subclasses. Move them into the base
class.
Note: In fact there is a bug in one version, which was fixed by this patch:
https://patchwork.ozlabs.org/patch/651697/
Signed-off-by: Simon Glass <sjg@chromium.org>
These functions are currently in a separate fdt_util file. Since they are
only used from PropBase and subclasses, it makes sense for them to be in the
PropBase class.
Move these functions into fdt.py along with the list of types.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have two separate implementations of the Fdt library, one which
uses fdtget/fdtput and one which uses libfdt (via swig).
Before adding more functionality it makes sense to create a base class for
these. This will allow common functions to be shared, and make the Fdt API
a little clearer.
Create a new fdt.py file with the base class, and adjust fdt_normal.py and
fdt_fallback.py to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
In preparation for creating an Fdt base class, rename this file to indicate
it is the normal Fdt implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than have dtc worry about which fdt library to use, move this into
a helper file. Add a function which creates a new Fdt object and scans it,
regardless of the implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is more useful to have this method raise an error when something goes
wrong. Make this the default and adjust the few callers that don't want to
use it this way.
Signed-off-by: Simon Glass <sjg@chromium.org>
This complements the size/fatsize/ext4size commands added in
commit cf6598193a
load, save and ls are already implemented for hostfs, now tests can
cover the same operations on hostfs and emulated block devices.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Simon Glass <sjg@chromium.org>
Changed 'Sandbox' to 'sandbox' in subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Import the latest version from the Diag software.
- Support LD21 SoC (including DDR chips in the package)
- Per-board granule adjustment for both reference and TV boards
- Misc cleanups
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper. Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
