The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
The board is unmaintained, just like the rest of the IXP.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC
files. PMIC init will be moved to pmic_common_init later.
This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display
and WB/LP0 are not supported yet.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
__pinmux_nand() won't compile if PERIPH_ID_NDFLASH isn't defined.
Prevent this from causing build problems on newer SoCs without NAND
support (or without SW support for NAND yet), but preventing
compilation unless the function will actually be used, i.e. when
CONFIG_TEGRA_NAND is defined.
Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, rewrote commit description, moved ifdef around whole function
rather than just body]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The PEXHC PCIe configuration mechanism ensures that the FPGA get
configured at power-up. Since all the PCIe devices should be configured
when the kernel start, u-boot has to take care that the FPGA gets
configured also in other reset scenarios, mostly because of possible
configuration change.
The used mechanism is taken from the km_kirkwood design and adapted to
the kmp204x case (slightly different HW and PCIe configuration).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
On the previous HW revision (now unsupported), there was a need for
external DMA signals and thus the I2C3/4 signals were used
DMA1_DONE/ACK/REQ.
These signals now are configured as GPIO[16:19].
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
According to the errata, some bits of an undocumented register in the
DCSR must be set for every core in order to avoid a possible data or
instruction corruption.
This is required for the 2.0 revision of the P2041 that should be used
as soon as available in our design.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This patch adds support for using some GPIOs that are connected to the
I2C bus to force the bus lines state and perform some bus deblocking
sequences.
The KM common deblocking algorithm from board/keymile/common/common.c is
used. The GPIO lines used for deblocking the I2C bus are some external
GPIOs provided by the QRIO CPLD:
- SCL = GPIOA_20
- SDA = GPIOA_21
The QRIO GPIOs act in an open-drain-like manner, for 0 the line is
driven low and for 1 the GPIO is set as input and the line gets
pulled-up.
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The QRIO GPIO functions can be of general interest. They are thus added
to a qrio.c and their prototype are available from kmp204x.h. The QRIO
prst function are also included in this file, as well as the functions
required for the I2C deblocking support (open-drain).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Remove extra blank line in board/keymile/kmp204x/qrio.c]
Signed-off-by: York Sun <yorksun@freescale.com>
Make use of the QRIO1 32bit register at 0x20 as bootcounter register
Check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read
Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: Minor change to commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
This covers only non-L2 switch ethernet interfaces i.e.
RGMII and SGMII interface for both T1040RDB and T1042RDB_PI
T1040RDB is configured as serdes protocol 0x66 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
1 SGMII on DTSEC3
T1042RDB_PI is configured as serdes protocol 0x06 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: Minor change in commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
Due to increased size of u-boot, FMAN ucode start address has been shifted
by 256KB causing a overlap with rootfs start address.
Update rootfs start address to reflect correct memory map.
Also fix minor typo in README
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This change allows updating environment stored on MMC by dfu or thor.
New setting:
- "params.bin mmc 0x38 0x8"
File params.bin can be generated by: tools/mkenvimage.
e.g. ./mkenvimage -s 4096 -o params.bin <env_text_file>
Every new env variable in text file should start with a new line.
Sample env text file:
- board/samsung/common/dfu_sample_env.txt
Requirements:
- file name: "params.bin"
- file size: 4096 Bytes - the same as CONFIG_ENV_SIZE.
Other size will cause CRC miscalculation at boot.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
CC: Piotr Wilczek <p.wilczek@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This simple LCD menu allows run one of download mode on device
without writing on console or for fast and easy upgrade.
This feature check user keys combination at boot:
- power key + volume up - download menu
- power key + volume down - thor mode (without menu)
New configs:
- CONFIG_LCD_MENU
- CONFIG_LCD_MENU_BOARD
For proper effect this feature needs following definitions:
Power key:
- KEY_PWR_PMIC_NAME - (string) pmic which supports power key check
Register address:
- KEY_PWR_STATUS_REG
- KEY_PWR_INTERRUPT_REG
Register power key mask:
- KEY_PWR_STATUS_MASK
- KEY_PWR_INTERRUPT_MASK
Gpio numbers:
- KEY_PWR_INTERRUPT_MASK
- KEY_VOL_DOWN_GPIO
Functions needs to be called:
- keys_init() - for set proper gpio direction
- check_boot_mode() - menu - main function
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Changes:
- check image bpp instead of resolution when returns logo address
- remove 32bpp logo
- add 16bpp logo in two formats: bmp and gzipped bmp
- init logo address with "0" for unsupported bpp mode
- update boards configs with proper image size for gunzip
- extend structure vidinfo by two fields: logo_x_offset and logo_y_offset.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.
Gpio coding mask:
0x000000ff - pin number
0x00ffff00 - bank offset
0xff000000 - part number
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Previously as a part of moving the VBUS gpio support to device tree
following patch removed this and added relevant support in driver:
4a271cb exynos: usb: Switch USB VBUS GPIOs to be device tree configured
Recent changes for common board file migration for exynos platform
added it again. So removing it now.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The gpio_*() apis require the exact gpio line number to deduce
the gpio bank and the gpio pin addresses.
So fix the gpio number for VBUS used for EHCI ports as well as
XHCI ports on exynos5250 boards.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
If CONFIG_CFI_FLASH_MTD is not defined, then we shouldn't perform the
flash early reset.
This commit fixes the following build error:
nios2-generic.c: In function `__early_flash_cmd_reset':
nios2-generic.c:23: error: `AMD_CMD_RESET' undeclared (first use in this function)
nios2-generic.c:23: error: (Each undeclared identifier is reported only once
nios2-generic.c:23: error: for each function it appears in.)
nios2-generic.c:24: error: `FLASH_CMD_RESET' undeclared (first use in this function)
which was introduced by:
commit a113fb39df
Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Date: Fri Dec 20 18:34:53 2013 -0300
board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header include
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
MAINTAINERS file has been removed from the project.
Replace its reference with 'boards.cfg' file instead.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
No need to pass 'u-boot.imx' as parameter for 'make' because u-boot.imx is
built by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Delete some serial.h files, whole code in which is surrounded by
#if 0 ... #endif
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Commit e5c5301f refactored the build system not to make
directories in board makefiles.
But commit 8f380381 create directories again in
board/avionic-design/tec-ng/Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Alban Bedel <alban.bedel@avionic-design.de>
Commit 643aae1406
deleted include/linux/config.h but missed to
delete _LINUX_CONFIG_H macro.
It is no longer used at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.
Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.
If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.
Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.
So, Increase the u-boot binary size to 768KB.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.
Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
read at 400KHz.
Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on the power in order to load U-Boot. However, it's best to be
explicit. For USB, this is necessary, since the module isn't powered
otherwise. This will allow the kernel USB driver to work.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Universal uses only one adapter I2C_0.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel
and other.
This disables TMU0 at the request of from kernel user.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
Add the initial support for the mx6 solo variant.
More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware
(Carrier-One was the previous name of Hummingboard).
Based on the work from Jon Nettleton <jon.nettleton@gmail.com>.
Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.
No changes are made to mx6slevk, which uses the default 50MHz fec clock.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation,
where we have only the first 1KiB of the OneNAND available upon power-up as a
memory-mapped area, from which the CPU starts executing, we place only the most
essential code into this first 1KiB . This code copies the rest of the SPL into
SRAM and jumps to it. This code is stored in section .text.0 .
The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on
the SPL, it will preserve only .text section, but the .text.0 and .text.1 are
stripped away from the result, thus making the SPL binary empty. The patch adds
additional -j parameters to the OBJCOPY for PXA during the SPL build, which will
preserve the .text.0 and .text.1 sections.
Moreover, this patch also adds missing functions into the .text.0 section, since
otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.
In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi-> initial arch dts file
zynq-zed.dts -> initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot> make DEVICE_TREE=zynq-zed
Enabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Byte offset of Ethernet mac address read from e-fuse are wrong so DHCP is
not working on some boards, modifying the offset to read properly.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ
and Tom Rix's email has long been bouncing.
Signed-off-by: Tom Rini <trini@ti.com>
CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary
review purpose.
So, use CONFIG_SPL_NAND_BOOT config.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
This fix is necessary after increased by one the number
of adapters in s3c24x0 driver.
Tested on Trats and Trats2.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This patch adds dts support for SMDK5420.
exynos5.dtsi created is a common file which has the nodes common
to both 5420 and 5250.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Adding the base patch for Exynos based SMDK5420.
This shall enable compilation and basic boot support for
SMDK5420.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.
exynos_init function is provided for platform specific code.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
With changes to the rtl8169 ethernet to improve cache support, we have
needed additional cache functions for mpc8245. As the board maintainer
has been unresponsive, remove this board.
Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Tom Rini <trini@ti.com>
GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
Adding details for the same.
Below is the brief description of DDR3 init sequence(SW leveling):
-> Enable VTT regulator
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program leveling registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
Adding LPDDR2 init sequence and register details for the same.
Below is the brief description of LPDDR2 init sequence:
-> Configure VTP
-> Configure DDR IO settings
-> Disable initialization and refreshes until EMIF registers are programmed.
-> Program Timing registers
-> Program PHY control and Temp alert and ZQ config registers.
-> Enable initialization and refreshes and configure SDRAM CONFIG register
-> Wait till initialization is complete and the configure MR registers.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Currently same value is programmed for all ioregs. This is not
the case for all SoC's like AM4372. So adding a structure for ioregs
and updating in all board files. And also return from config_cmd_ctrl()
and config_ddr_data() functions if data is not passed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Fixup dxr2, cm_t335, adapt pcm051 rev3]
Signed-off-by: Tom Rini <trini@ti.com>
Updating the Multiplier and Dividers value for all DPLLs.
Safest OPP is read from DEV ATTRIBUTE register. Accoring to the value
returned the MPU DPLL is locked.
At different OPPs follwoing are the MPU locked frequencies.
OPP50 300MHz
OPP100 600MHz
OPP120 720MHz
OPPTB 800MHz
OPPNT 1000MHz
According to the latest DM following is the OPP table dependencies:
VDD_CORE VDD_MPU
OPP50 OPP50
OPP50 OPP100
OPP100 OPP50
OPP100 OPP100
OPP100 OPP120
So at different OPPs of MPU it is safest to lock CORE at OPP_NOM.
Following are the DPLL locking frequencies at OPP NOM:
Core locks at 1000MHz
Per locks at 960MHz
LPDDR2 locks at 266MHz
DDR3 locks at 400MHz
Touching AM33xx files also to get DPLL values specific to board but no
functionality difference.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Updating the mux data for UART, adding data for i2c0 and mmc.
And also updating pad_signals structure.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
CONFIG_ENV_VARS_UBOOT_CONFIG, CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and
CONFIG_BOARD_LATE_INIT is already set. Adding support to detect the
board. These variables are used by findfdt.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for reading onboard EEPROM to enable
board detection.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for the new Tamonten™ NG platform from Avionic Design.
Currently only I2C, MMC, USB and ethernet have been tested.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When DT define aliases for etherner0 and ethernet1, U-Boot
automatically patched MAC addresses using ethaddr and eth1addr
environment variables respectively.
Custom initialization is no longer needed.
Signed-off-by: Sergei Ianovich <ynvich@gmail.com>
CC: Marek Vasut <marex@denx.de>
