Commit Graph

2116 Commits

Author SHA1 Message Date
Otavio Salvador
8b8d81047d MX28: Fix a typo in mx28_reg_8 macro
The macro mistakenly referred to 32bit struct instead of 8bit one.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:27 +02:00
Fabio Estevam
3f5f200bbe mx53: Fix mask for SATA reference clock
SATA_ALT_REF_CLK field corresponds to bits 1 and 2 of offset 0x180c.

Fix the mask for these bits.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:25 +02:00
Jason Liu
0d952e5d2e i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly
If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct

Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-07 14:07:25 +02:00
Rajeshwari Shinde
c5e3710a18 EXYNOS5: PINMUX: Added default pinumx settings
This patch performs the pinmux configuration in a common file.
As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is
supported.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2012-07-07 14:07:25 +02:00
Minkyu Kang
7775831dd3 Exynos: fix cpuinfo and cpu detecting
Since Exynos architecture have new SoCs,
need to fix cpuinfo correctly.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Chander Kashyap <chander.kashyap@linaro.org>
2012-07-07 14:07:25 +02:00
SRICHARAN R
e423a8f76d ARM: OMAP4: Correct the lpddr2 io settings register value.
To meet certain timing requirements on the lpddr2 cmd and data phy
interfaces ,lpddr iopads have to be configured as differential buffers
and a Vref has to be internally generated and provided to these buffers.

Correcting the above settings here.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
7fd5b9bfe4 OMAP5: Change voltages for omap5432
Change voltages for OMAP5432

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
753bae8c5d OMAP5: DPLL core lock for OMAP5432
No need to Unlock DPLL initially.
DDR3 can work at normal OPP from initialozation

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
784ab7c545 OMAP5: EMIF: Add support for DDR3 device
In OMAP5432 EMIF controlller supports DDR3 device.
This patch adds support for ddr3 device intialization and configuration.
Initialization sequence is done as specified in JEDEC specs.
This also adds support for ddr3 leveling.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:24 +02:00
Lokesh Vutla
43037d7631 OMAP5: ADD precalculated timings for ddr3
Adding precalculated timings for ddr3 with 1cs
adding required registers for ddr3

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
eb4e18e89e OMAP5: Configure the io settings for omap5432 uevm board
This patch adds the IO settings required for OMAP5432 uevm's DDR3 pads

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
0a0bf7b217 OMAP5: ADD chip detection for OMAP5432 SOC
This patch adds chip detection for OMAP5432

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Lokesh Vutla
851bebd68c OMAP5: Adding correct Control id code for OMAP5430
Control id code for omap5430 ES1.0 is hard coded with a wrong value.
This patch corrects the value

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2012-07-07 14:07:23 +02:00
Tom Rini
65c206b688 am33xx: Fix i2c sampling rate typo
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Tom Rini
d88bc0425b am33xx: Fill in more cm_wkuppll / cm_perpll
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Tom Rini
fe4f97b98f am335x: Correct i2c sysc offset
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher <hs@denx.de>
2012-07-07 14:07:22 +02:00
Troy Kisky
d5b069ecb4 DaVinci: fix ddr2 vtp i/o calibration
Previously, only the low 5 bits (NCH) were being transfered
from DDRVTPR to DDRVTPIOCR, the bits 5-9 where zeroed.

VTP_RECAL should be bit 15, not 18.

The only mainline board affected by this change is davinci_sonata.
The other Davinci boards define CONFIG_SKIP_LOWLEVEL_INIT.

However, if the program that loads u-boot on these boards
copied the code from u-boot, they will need fixed as well.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>

Please get tested by acks before applying, where tested by
means an overnight memory test.

Thanks
Troy
2012-07-07 14:07:22 +02:00
SRICHARAN R
e843d0f7ee ARM: OMAP5: Correct the DRAM_ADDR_SPACE_END macro.
OMAP5 evm board has 2GB of memory. So correct the
macro to take in to account of the full dram size.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:22 +02:00
SRICHARAN R
41321fd4d6 ARM: OMAP5: Align memory used for testing to the power of 2
get_ram_size checks the given memory range for valid ram,
but expects the size of memory to be aligned to the power
of 2. In case of OMAP5 evm board the memory available is
2GB - 16MB(used for TRAP section) = 2032MB.

So always ensure that the size of memory used for testing is
aligned to the power of 2.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:22 +02:00
SRICHARAN R
77efdeb758 ARM: OMAP5: dmm: Create a tiler trap section.
The unmapped entries in tiler space are set with
values 0xFF. So creating a DMM section of
size 16MB at 0xFF000000 with ADDRSPACE set to 0x2.

This way all the unmapped entry accesses to tiler
will be trapped by the EMIF and a error response
is sent to the L3 interconnect. L3 errors are
inturn reported to MPU.

Note that here the tiler trap section is overlapping
with the actual ddr physical space and we lose 16MB
out of the total 2GB.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:22 +02:00
SRICHARAN R
e06e914d87 ARM: OMAP4+: dmm: Take care of overlapping dmm and trap sections.
The DMM sections can be overlapping with each other, with
sections 3 to 0 having the highest to lowest priority in that
order. There could also be a section that is used trap the
unmapped Tiler entries and this trap section could be
overlapping with the actual sdram area.

So take care of the above scenarios while calculating the
size of the actual ram.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
2012-07-07 14:07:21 +02:00
Tom Rini
2ab2810375 am33xx: Do not call init_timer twice
We do not need to call init_timer both in SPL and U-Boot itself, just
SPL needs to initialize the timer.

Signed-off-by: Tom Rini <trini@ti.com>
2012-07-07 14:07:21 +02:00
Tom Warren
76e350b7a3 arm: Tegra: Use ODMDATA from BCT in IRAM
Walk the BIT and BCT to find the ODMDATA word in the
CustomerData field and put it into Scratch20 reg for
use by kernel, etc.

Built all Tegra builds OK; Booted on Seaboard and saw
ODMDATA in PMC scratch20 was the same as the value in my
burn-u-boot.sh file (0x300D8011). NOTE: All flash utilities
will have to specify the odmdata (nvflash --odmdata n) on
the command line or via a cfg file, or built in to their
BCT.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2012-07-07 14:07:21 +02:00
Tom Warren
52a8b82074 gpio: tegra2: rename tegra2_gpio.* to tegra_gpio.*
In anticipation of Tegra3 support, continue removing/renaming
Tegra2-specific files. No functional changes (yet).
Updated copyrights to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
Tom Warren
edffa63d3d spi: tegra2: rename tegra2_spi.* to tegra_spi.*
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:20 +02:00
amartin@nvidia.com
f3717ac584 tegra: override compiler flags for low level init code
Override -march setting for tegra to -march=armv4t for files that are
necessary for low level init on tegra.

The recent change to use -march=armv7-a for armv7 caused a regression
on tegra because tegra starts boot on a arm7tdmi processor before
transferring control to the cortex-a9.  While still executing on the
arm7tdmi there are calls to getenv_ulong() and memset() that cause an
illegal instruction exception if compiled for armv7.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Simon Glass
27c4a3318f tegra: Correct PLL access in ap20.c and clock.c
Correct this warning seen by Albert:

ap20.c:44:18: warning: array subscript is above array bounds

There is a subtle bug here which currently causes no errors, but might
in future if people use PCI or the 32KHz clock. So take the opportunity
to correct the logic now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
d1e4607901 tegra: add SDMMC1 on SDIO1 funcmux entry
This will be used on TrimSlice.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Lucas Stach
a2cfe63eeb tegra: add SDIO1 funcmux entry for UARTA
This is based on top of:
tegra: add alternate UART1 funcmux entry
tegra: add UART1 on GPU funcmux entry

v2: remove enum change

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
CC: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Lucas Stach
ffec1eb9c7 tegra: sync SDIO1 pingroup enum name with TRM
Signed-off-by: Lucas Stach <dev@lynxeye.de>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Stephen Warren
e21649be56 tegra: add UART1 on GPU funcmux entry
TrimSlice uses UART1 on the GPU pingroup.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:18 +02:00
Stephen Warren
b9607e7061 tegra: add alternate UART1 funcmux entry
(In at least some configurations) Whistler uses UART1 on pingroups
UAA, UAB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:17 +02:00
Tom Warren
078078cfa9 spi: Tegra2: Seaboard: fix UART corruption during SPI transactions
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
2012-07-07 14:07:17 +02:00
Tom Rini
26750c8aee CONFIG_SYS_BAUDRATE_TABLE: Add <config_fallbacks.h>, place there
We provide a default table of { 9600, 19200, 38400, 57600, 115200 }
in <config_fallbacks.h> which mkconfig places after <configs/...h> in
the generated config file.  This is used when a board has not set its
own table.

Signed-off-by: Tom Rini <trini@ti.com>
2012-06-20 20:26:16 +02:00
Wolfgang Denk
fedab338f3 Merge branch 'master' of git://git.denx.de/u-boot-video
* 'master' of git://git.denx.de/u-boot-video:
  video: atmel/lcd: add LCD driver for new Atmel SoC
  video: cfb_console: flush dcache for frame buffer in DRAM
  cfb_console: Ignore bell character
  cfb_console: Add console_clear_line function
  cfb_console: Fix function console_back
  omap3_dss: cosmetic changes
  omap3_dss: add optional framebuffer
  mx53loco: Add LCD support
  mx5: Rename mx51_fb_init()
  mx53: Allow IPUv3 driver to also work on mx53
  mx51evk: Add LCD support
  EXYNOS: display 32bpp bitmap TIZEN logo
  create lib/tizen directory
  LCD: display 32bpp decompressed bitmap image
  common/lcd.c: reduce one CONFIG_LCD_LOGO ifdef
  common/lcd.c: reduce some CONFIG_LCD_*_LOGO ifdefs
  common/lcd.c: use ARRAY_SIZE
  cmd_bmp.c: make bmp_display() usable by drivers or board code
  LCD: support another s6e8ax0 panel type
  LCD: change s6e8ax0 panel gamma value
  include/video.h: drop unused video_printf()

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-06-07 23:42:17 +02:00
Wolfgang Denk
74b5b5dbc3 Merge branch 'master' of git://git.denx.de/u-boot-avr32
* 'master' of git://git.denx.de/u-boot-avr32:
  avr32:board.c: fix compile warning
  avr32:grasshopper: fix PHY initialisation

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-06-07 23:41:03 +02:00
Wolfgang Denk
d1c6e9e44a Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  MIPS: board.c: move extern declarations to u-boot-mips.h
  MIPS: bootm_qemu_mips.c: make checkpatch.pl clean
  MIPS: bootm.c: make checkpatch.pl clean

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-06-07 23:38:54 +02:00
Wolfgang Denk
76aef69e49 Merge branch 'master' of git://git.denx.de/u-boot-sh
* 'master' of git://git.denx.de/u-boot-sh:
  sh/ap_sh4a_4a: Fix typo of operator in ET0_ETXD4
  sh: Add SH7269 device and RSK2+SH7269 board
  sh: Set CONFIG_SH_ETHER_PHY_MODE and CONFIG_SH_ETHER_SH7734_MII to boards with sh_eth
  sh: Add support for AP-SH4A-4A board
  sh: Add register definition of PFC for SH7734
  sh: r0p7734: Add support I2C controller
  sh: Add bit control functions
  sh: Add support for r0p7734 board
  sh: Add support Renesas SH7734

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-06-07 23:34:11 +02:00
Marek Vasut
25315683fd MPC8xxx: Define cache ops for USB
This patch conditionally defines flush_dcache_range() and
invalidate_dcache_range() on MPC8xxx, to avoid EHCI complaining,
resulting in the following output:

$ ARCH=powerpc CROSS_COMPILE=powerpc-linux-gnu- ./MAKEALL MPC8572DS
Configuring for MPC8572DS board...
make: *** [u-boot] Error 1
powerpc-linux-gnu-size: './u-boot': No such file
e1000.c: In function ‘e1000_initialize’:
e1000.c:5264:13: warning: assignment from incompatible pointer type [enabled by default]
tsec.c: In function ‘tsec_initialize’:
tsec.c:638:12: warning: assignment from incompatible pointer type [enabled by default]
drivers/usb/host/libusb_host.o: In function `ehci_td_buffer':
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:186: undefined reference to `flush_dcache_range'
drivers/usb/host/libusb_host.o: In function `ehci_submit_async':
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:346: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:348: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:349: undefined reference to `flush_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:372: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:374: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:376: undefined reference to `invalidate_dcache_range'
/home/marex/U-Boot/u-boot-imx/drivers/usb/host/ehci-hcd.c:386: undefined reference to `invalidate_dcache_range'
make: *** [u-boot] Error 1

--------------------- SUMMARY ----------------------------
Boards compiled: 1
Boards with errors: 1 ( MPC8572DS )
----------------------------------------------------------

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
2012-06-07 23:29:19 +02:00
Andreas Bießmann
d3a105a26f avr32:board.c: fix compile warning
This patch fixes following warning:

---8<---
board.c: In function 'board_init_r':
board.c:257: warning: unused variable 's'
--->8---

Patch de30122bb5 missed to remove this variable
too.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-06-04 09:21:34 +02:00
Daniel Schwierzeck
e034ea3b77 MIPS: board.c: move extern declarations to u-boot-mips.h
This fixes some remaining checkpatch.pl warnings.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Daniel Schwierzeck
ed53010441 MIPS: bootm_qemu_mips.c: make checkpatch.pl clean
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Daniel Schwierzeck
e51a6b7a6c MIPS: bootm.c: make checkpatch.pl clean
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-06-03 23:46:04 +02:00
Phil Edworthy
99744b7e34 sh: Add SH7269 device and RSK2+SH7269 board
This is an sh2a device (max 266MHz) with FPU, video display
controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports,
SD and on-chip USB.

The RSK2+SH7269 board uses the SH7269 processor. It is often
referred to as just rsk7269.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-05-28 09:12:54 +09:00
Nobuhiro Iwamatsu
4eb0b78e76 sh: Add register definition of PFC for SH7734
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-05-28 09:12:53 +09:00
Nobuhiro Iwamatsu
1379c51ea5 sh: Add bit control functions
This provide bit control functions as clrbits_*, setbits_* and
clrsetbits_*.

V2: Fix comment style and error of whitespace.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-05-28 09:12:53 +09:00
Nobuhiro Iwamatsu
2a57e7ec96 sh: Add support Renesas SH7734
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2012-05-28 09:12:53 +09:00
Jeroen Hofstee
8da2efb661 omap3_dss: cosmetic changes
Remove unnecessary brackets.
Unwrap lines which are below 80 chars.
Single line comment as single line (as the rest).
Moved init values to the source code.

cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-05-25 15:35:25 +02:00
Jeroen Hofstee
d9c13aac14 omap3_dss: add optional framebuffer
The beagle board uses the background color to show an orange screen during
startup. This patch adds the ability to add a frame buffer, with the
intention not to break the beagle board use case (I don't have one).
videomodes.c is not used. Scrolling depends on this patch:

http://patchwork.ozlabs.org/patch/155662/

cc: trini@ti.com
cc: s-paulraj@ti.com
cc: khasim@ti.com
Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
2012-05-25 15:34:18 +02:00
Fabio Estevam
fff6ef72b3 mx53: Allow IPUv3 driver to also work on mx53
Adjust the IPU base registers so that ipuv3 driver can work on both mx51 and
mx53 SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-25 10:36:29 +02:00