mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-07 03:36:16 +09:00
EXYNOS5: PINMUX: Added default pinumx settings
This patch performs the pinmux configuration in a common file. As of now only EXYNOS5 pinmux for SDMMC, UART and Ethernet is supported. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Rajeshwari Shinde
Albert ARIBAUD
parent
a0f5b5a3a2
commit
c5e3710a18
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@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(SOC).o
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COBJS += clock.o power.o soc.o system.o
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COBJS += clock.o power.o soc.o system.o pinmux.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
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220
arch/arm/cpu/armv7/exynos/pinmux.c
Normal file
220
arch/arm/cpu/armv7/exynos/pinmux.c
Normal file
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@ -0,0 +1,220 @@
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/*
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* Copyright (c) 2012 Samsung Electronics.
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* Abhilash Kesavan <a.kesavan@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/sromc.h>
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static void exynos5_uart_config(int peripheral)
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{
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struct exynos5_gpio_part1 *gpio1 =
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(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
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struct s5p_gpio_bank *bank;
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int i, start, count;
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switch (peripheral) {
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case PERIPH_ID_UART0:
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bank = &gpio1->a0;
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start = 0;
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count = 4;
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break;
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case PERIPH_ID_UART1:
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bank = &gpio1->a0;
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start = 4;
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count = 4;
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break;
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case PERIPH_ID_UART2:
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bank = &gpio1->a1;
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start = 0;
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count = 4;
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break;
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case PERIPH_ID_UART3:
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bank = &gpio1->a1;
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start = 4;
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count = 2;
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break;
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}
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for (i = start; i < start + count; i++) {
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s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
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s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
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}
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}
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static int exynos5_mmc_config(int peripheral, int flags)
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{
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struct exynos5_gpio_part1 *gpio1 =
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(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
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struct s5p_gpio_bank *bank, *bank_ext;
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int i;
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switch (peripheral) {
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case PERIPH_ID_SDMMC0:
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bank = &gpio1->c0;
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bank_ext = &gpio1->c1;
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break;
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case PERIPH_ID_SDMMC1:
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bank = &gpio1->c1;
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bank_ext = NULL;
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break;
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case PERIPH_ID_SDMMC2:
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bank = &gpio1->c2;
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bank_ext = &gpio1->c3;
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break;
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case PERIPH_ID_SDMMC3:
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bank = &gpio1->c3;
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bank_ext = NULL;
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break;
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}
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if ((flags & PINMUX_FLAG_8BIT_MODE) && !bank_ext) {
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debug("SDMMC device %d does not support 8bit mode",
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peripheral);
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return -1;
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}
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if (flags & PINMUX_FLAG_8BIT_MODE) {
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for (i = 3; i <= 6; i++) {
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s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
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s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_UP);
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s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
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}
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}
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for (i = 0; i < 2; i++) {
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s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
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s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
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s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
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}
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for (i = 3; i <= 6; i++) {
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s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
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s5p_gpio_set_pull(bank, i, GPIO_PULL_UP);
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s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
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}
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return 0;
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}
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static void exynos5_sromc_config(int flags)
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{
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struct exynos5_gpio_part1 *gpio1 =
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(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
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int i;
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/*
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* SROM:CS1 and EBI
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*
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* GPY0[0] SROM_CSn[0]
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* GPY0[1] SROM_CSn[1](2)
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* GPY0[2] SROM_CSn[2]
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* GPY0[3] SROM_CSn[3]
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* GPY0[4] EBI_OEn(2)
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* GPY0[5] EBI_EEn(2)
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*
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* GPY1[0] EBI_BEn[0](2)
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* GPY1[1] EBI_BEn[1](2)
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* GPY1[2] SROM_WAIT(2)
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* GPY1[3] EBI_DATA_RDn(2)
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*/
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s5p_gpio_cfg_pin(&gpio1->y0, (flags & PINMUX_FLAG_BANK),
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GPIO_FUNC(2));
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s5p_gpio_cfg_pin(&gpio1->y0, 4, GPIO_FUNC(2));
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s5p_gpio_cfg_pin(&gpio1->y0, 5, GPIO_FUNC(2));
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for (i = 0; i < 4; i++)
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s5p_gpio_cfg_pin(&gpio1->y1, i, GPIO_FUNC(2));
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/*
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* EBI: 8 Addrss Lines
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*
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* GPY3[0] EBI_ADDR[0](2)
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* GPY3[1] EBI_ADDR[1](2)
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* GPY3[2] EBI_ADDR[2](2)
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* GPY3[3] EBI_ADDR[3](2)
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* GPY3[4] EBI_ADDR[4](2)
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* GPY3[5] EBI_ADDR[5](2)
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* GPY3[6] EBI_ADDR[6](2)
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* GPY3[7] EBI_ADDR[7](2)
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*
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* EBI: 16 Data Lines
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*
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* GPY5[0] EBI_DATA[0](2)
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* GPY5[1] EBI_DATA[1](2)
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* GPY5[2] EBI_DATA[2](2)
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* GPY5[3] EBI_DATA[3](2)
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* GPY5[4] EBI_DATA[4](2)
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* GPY5[5] EBI_DATA[5](2)
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* GPY5[6] EBI_DATA[6](2)
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* GPY5[7] EBI_DATA[7](2)
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*
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* GPY6[0] EBI_DATA[8](2)
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* GPY6[1] EBI_DATA[9](2)
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* GPY6[2] EBI_DATA[10](2)
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* GPY6[3] EBI_DATA[11](2)
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* GPY6[4] EBI_DATA[12](2)
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* GPY6[5] EBI_DATA[13](2)
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* GPY6[6] EBI_DATA[14](2)
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* GPY6[7] EBI_DATA[15](2)
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*/
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for (i = 0; i < 8; i++) {
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s5p_gpio_cfg_pin(&gpio1->y3, i, GPIO_FUNC(2));
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s5p_gpio_set_pull(&gpio1->y3, i, GPIO_PULL_UP);
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s5p_gpio_cfg_pin(&gpio1->y5, i, GPIO_FUNC(2));
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s5p_gpio_set_pull(&gpio1->y5, i, GPIO_PULL_UP);
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s5p_gpio_cfg_pin(&gpio1->y6, i, GPIO_FUNC(2));
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s5p_gpio_set_pull(&gpio1->y6, i, GPIO_PULL_UP);
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}
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}
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static int exynos5_pinmux_config(int peripheral, int flags)
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{
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switch (peripheral) {
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case PERIPH_ID_UART0:
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case PERIPH_ID_UART1:
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case PERIPH_ID_UART2:
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case PERIPH_ID_UART3:
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exynos5_uart_config(peripheral);
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break;
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case PERIPH_ID_SDMMC0:
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case PERIPH_ID_SDMMC1:
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case PERIPH_ID_SDMMC2:
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case PERIPH_ID_SDMMC3:
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return exynos5_mmc_config(peripheral, flags);
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case PERIPH_ID_SROMC:
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exynos5_sromc_config(flags);
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break;
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default:
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debug("%s: invalid peripheral %d", __func__, peripheral);
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return -1;
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}
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return 0;
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}
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int exynos_pinmux_config(int peripheral, int flags)
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{
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if (cpu_is_exynos5())
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return exynos5_pinmux_config(peripheral, flags);
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else {
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debug("pinmux functionality not supported\n");
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return -1;
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}
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}
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47
arch/arm/include/asm/arch-exynos/periph.h
Normal file
47
arch/arm/include/asm/arch-exynos/periph.h
Normal file
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@ -0,0 +1,47 @@
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Rajeshwari Shinde <rajeshwari.s@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_PERIPH_H
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#define __ASM_ARM_ARCH_PERIPH_H
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/*
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* Peripherals requiring clock/pinmux configuration. List will
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* grow with support for more devices getting added.
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*
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*/
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enum periph_id {
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PERIPH_ID_SDMMC0,
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PERIPH_ID_SDMMC1,
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PERIPH_ID_SDMMC2,
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PERIPH_ID_SDMMC3,
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PERIPH_ID_SROMC,
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PERIPH_ID_UART0,
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PERIPH_ID_UART1,
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PERIPH_ID_UART2,
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PERIPH_ID_UART3,
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PERIPH_ID_COUNT,
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PERIPH_ID_NONE = -1,
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};
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#endif /* __ASM_ARM_ARCH_PERIPH_H */
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58
arch/arm/include/asm/arch-exynos/pinmux.h
Normal file
58
arch/arm/include/asm/arch-exynos/pinmux.h
Normal file
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@ -0,0 +1,58 @@
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/*
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* Copyright (C) 2012 Samsung Electronics
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* Abhilash Kesavan <a.kesavan@samsung.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_PINMUX_H
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#define __ASM_ARM_ARCH_PINMUX_H
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#include "periph.h"
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/*
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* Flags for setting specific configarations of peripherals.
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* List will grow with support for more devices getting added.
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*/
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enum {
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PINMUX_FLAG_NONE = 0x00000000,
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/* Flags for eMMC */
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PINMUX_FLAG_8BIT_MODE = 1 << 0, /* SDMMC 8-bit mode */
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/* Flags for SROM controller */
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PINMUX_FLAG_BANK = 3 << 0, /* bank number (0-3) */
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PINMUX_FLAG_16BIT = 1 << 2, /* 16-bit width */
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};
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/**
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* Configures the pinmux for a particular peripheral.
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*
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* Each gpio can be configured in many different ways (4 bits on exynos)
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* such as "input", "output", "special function", "external interrupt"
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* etc. This function will configure the peripheral pinmux along with
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* pull-up/down and drive strength.
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*
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* @param peripheral peripheral to be configured
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* @param flags configure flags
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* @return 0 if ok, -1 on error (e.g. unsupported peripheral)
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*/
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int exynos_pinmux_config(int peripheral, int flags);
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#endif
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