Commit Graph

56417 Commits

Author SHA1 Message Date
Tom Rini
36c97c4db7 Merge branch 'master' of git://git.denx.de/u-boot-spi
- drop non-DM code from ti_qspi
- support spi-mem for ti_qspi
2019-04-17 09:21:32 -04:00
Uri Mashiach
ecb76eff56 arm: am57xx: cl-som-am57x: remove board support
U-Boot support for the CL-SOM-AM57x module is no longer required.

Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
2019-04-17 09:20:26 -04:00
Tom Rini
4b37f36d68 Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Convert DM_MMC and DM_SCSI
- A20, R40, H6 Linux dts(i) sync
- CLK, RESET support for sunxi, sun8_emac net drivers
2019-04-17 09:19:45 -04:00
Tom Rini
14b8c420b8 Xilinx/FPGA changes for v2019.07
fpga:
 - Add support for external data in FIT
 - Extend testing for external data case
 - Inform user about a need to run post config on Zynq
 
 arm:
 - Tune zynq command functions
 - Fix internal variable setting
 
 arm64:
 - Add support for zc39dr decoding
 - Disable WDT for zcu100
 - Small changes in reset_reason()
 - Some DT changes (spi)
 - Tune qspi-mini configuration
 - Remove useless eeprom setting
 - Fix two sdhci boot case
 
 spi:
 - Fix tap delay programming
 
 clk:
 - Enable i2c in SPL
 
 net:
 - Fix gem phydev handling
 - Remove phy detection code from gem driver
 
 general:
 - Correct EXT_DTB usage for MULTI_DTB_FIT configuration
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAly262oACgkQykllyylKDCH44gCbBnuxUH6ZF0B7Leuee4te7C59
 LmUAn14/bbtMt17zkMSADCjY9yGWF4au
 =mWrW
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2019.07' of git://git.denx.de/u-boot-microblaze

Xilinx/FPGA changes for v2019.07

fpga:
- Add support for external data in FIT
- Extend testing for external data case
- Inform user about a need to run post config on Zynq

arm:
- Tune zynq command functions
- Fix internal variable setting

arm64:
- Add support for zc39dr decoding
- Disable WDT for zcu100
- Small changes in reset_reason()
- Some DT changes (spi)
- Tune qspi-mini configuration
- Remove useless eeprom setting
- Fix two sdhci boot case

spi:
- Fix tap delay programming

clk:
- Enable i2c in SPL

net:
- Fix gem phydev handling
- Remove phy detection code from gem driver

general:
- Correct EXT_DTB usage for MULTI_DTB_FIT configuration
2019-04-17 09:19:13 -04:00
Tom Rini
88d5ab3d67 UniPhier SoC updates for v2019.07
- Sync DT with Linux 5.1-rc4
 
 - Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJctlk9AAoJED2LAQed4NsGsBoP/0wXmetq2UKCn+4qWy3+2ItR
 M8hspsdpIclFTcG7D8kxeCWgMv0SH6hFbRgEo8gfnHX/kWCXnklgVc7q2rEWIk53
 0Dze8Zopr0YULhx8Esuq1viS/WVz1qPVK0cnqJc4QgBbXxLWxc9xC1WUV61G0ls2
 3oHGLbEJTtTE2cbEIJaRIu1pfravN4RoJtsiO+Gum1LEtoyQ/h7g/5f/equwJ0q3
 QwbvASuXOyoyhypcjA97PAQZru54e8cqFd1VwRJNJMryjkOOk7Tq+z77WwtFiv7G
 heDy0P0b/ykxoasUMwPOOkC7/uVjeh6lsoOqiJejQan7bcYEWPsWRPflZeFVFTIS
 ptfir+LCNaBdUddVP7IcNaRRrho11zyvhOcHLb+df7dI7UNytux9YA0CIOlgFNmZ
 /lIxKlCfXKEft20XHTxIfSoPPrlmmKzk1zyvv8+rZLsMW0yBIQkLUoXKcZL+dmSG
 3U8DrCNZlc4xHVEh69dntqHZ2+5TtpKV3KEBnEOHAwlqSdP6K0sU0no1hZ4H0gkU
 xylEihbMxwGljIAQt3VBiGb+UDlvZKvADyZDKnRt1OSO65Z3z1Vt2W4ziSrcWCTC
 bloy6jiOxaRkbXeEQSmjKfmOr3DpagyUuESjTKLFhYeFLl9dqMURh4C0FtP3M50d
 R6ivoyBE6BLnK8gOz9JL
 =YEOC
 -----END PGP SIGNATURE-----

Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphier

UniPhier SoC updates for v2019.07

- Sync DT with Linux 5.1-rc4

- Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
2019-04-17 09:16:38 -04:00
Vignesh Raghavendra
4c96c61216 spi: ti_qspi: Convert to spi-mem ops
Convert driver to use  spi-mem ops in order to support accelerated MMIO
flash interface in generic way and for better performance.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 17:43:54 +05:30
Vignesh Raghavendra
61ae9782ef spi: ti_qspi: Drop non DM code
Now that all boards using TI QSPI have moved to DM and DT, drop non DM
code completely.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[jagan: update MIGRATION.txt, rebase config_whitelist.txt]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 17:43:19 +05:30
Andre Przywara
f8c8669760 sunxi: update SATA driver to always use DM_SCSI
It seems like the Allwinner SATA driver is already quite capable of
using the driver model, so we can force this on all boards and can
remove support for a non-DM_SCSI build.
This removes the warning about boards with SATA ports not being
DM_SCSI compliant.

It also takes the opportunity to move the driver out of the board/sunxi
directory to join its siblings in drivers/ata, and to make it a proper
Kconfig citizen.

The board defconfigs stay untouched.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: select DM_SCSI separately]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
bb3362b0ca arm: sunxi: Enable DM_MMC and DM_SCSI
- Enable DM_MMC if MMC defined
- Enable DM_SCSI if SCSI defined

globally through Allwinner platform, the effected SoC families
and boards will make use of MMC and SCSI subsystems in driver-model.

Tested DM_MMC in one board from A64, H6, H5, H3, R40, A83T, A20, A10
SoCs.

Tested-by: Pablo Sebastián Greco <pgreco@centosproject.org> # BPI-M2-Ultra
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
6c90036f7b ARM: dts: sun8i-r40-bananapi-m2-berry: Enable AHCI
Enable ahci node for BPI-M2-Berry, this would require since
we have DM_SCSI enabled on the respective SoC.

Unable to sync the same node from Linux, since the similar change
is still in Linux ML.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
36b53ab24e ARM: dts: a20-wits-pro-a20-dkt: Enable AHCI
Enable ahci node for a20-wits-pro-a20-dkt, this would require since
we have DM_SCSI enabled on the respective SoC.

Right now, ahci enabled in -u-boot.dtsi and will remove once same
supported by Linux.

Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
328c5f09c9 ARM: dts: a20-m5: Enable AHCI
Enable ahci node for sun7i-a20-m5.dts, this would require since
we have DM_SCSI enabled on the respective SoC.

No need to send patch to Linux for this change, since this
dts is U-Boot specific.

Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
cbb9cdc7aa board: sunxi: Add R40 sata compatible
Add sata compatible for R40.

Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
0cc47a8ead arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun7i-a20* sync:
"ARM: dts: sun7i: bananapi: Add GPIO banks regulators"
(sha1: 09c6572290f018d73ec2e812e28bada34d41815f)

Here are U-Boot specific dts changes.

- s/uart0_pins_a/uart0_pb_pins for
  sun7i-a20-ainol-aw1.dts
  sun7i-a20-m5.dts
  sun7i-a20-primo73.dts
  sun7i-a20-yones-toptech-bd1078.dts
  sunxi-itead-core-common.dtsi
- s/gmac_pins_mii_a/gmac_rgmii_pins for
  sun7i-a20-m5.dts
- drop i2c0, i2c1 pins from
  sunxi-itead-core-common.dtsi
- drop mmc0 pins from
  sun7i-a20-primo73.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Jagan Teki
3705d4965f arm: allwinner: r40: Sync R40 dts(i) files from Linux 5.1-rc2
Sync sun8i-r40 dts(i) files from Linux 5.1-rc2

Linux commit details about the sun8i-r40* sync:
"ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node"
(sha1: 1e5f1db4ccd8348a21da55bff82f4263000879ef)

Linux commit details about the sun8i-v40* sync:
"ARM: dts: sunxi: Fix I2C bus warnings"
(sha1: 0729b4af5753b65aa031f58c435da53dbbf56d19)

Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-17 14:34:45 +05:30
Masahiro Yamada
07f967ff98 ARM: uniphier_v8: enable CONFIG_SUPPORT_EMMC_RPMB
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-04-17 07:23:13 +09:00
Masahiro Yamada
cd33feda6b ARM: dts: uniphier: sync with Linux 5.1-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-04-17 07:22:23 +09:00
Jagan Teki
99a8a3114f board: sunxi: gmac: Remove Ethernet clock and reset
Since Ethernet clock and reset is now handling via
CLK and RESET frameworks via driver API's remove
explicit ccm writes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
d3a2c0586e net: sun8i_emac: Add CLK and RESET support
Add CLK and RESET support for sun8i_emac driver to
enable TX clock and reset pins via CLK and RESET
framework.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
695f6043c9 net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandle
Unlike other Allwinner SoC's R40 GMAC clock control register
is locate in CCU, but rest located via syscon itself. Since
the phandle property for current code look for 'syscon' and
it will grab the respective ccu or syscon base address based
on DT property defined in respective SoC dtsi.

So, use the existing 'syscon' code even for R40 for retrieving
GMAC clock via CCU and update the register directly in
sun8i_emac_set_syscon instead of writing it separately using
ccm base.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:01 +05:30
Jagan Teki
0ed8eaf1de net: sunxi_emac: Add CLK support
Add CLk support for sunxi_emac to enable AHB_EMAC clock
via CLK framework.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-16 16:29:00 +05:30
Jagan Teki
33685372cf clk: sunxi: r40: Fix GMAC reset reg offset
GMAC reset reg offset added by below commit seems to assume
it as EMAC but R40 indeed using GMAC.
"clk: sunxi: Implement EMAC, GMAC clocks, resets"
(sha1: 68620c9698)

So, fix by updating the reg offset for RST_BUS_GMAC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-16 16:29:00 +05:30
Luca Ceresoli
350cfe79a8 arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI
A missing CONFIG_ prefix while checking for this Kconfig variable makes the
check always fail. Fix it. While there also switch from the '#if defined'
form to the '#ifdef' form as the other checks in this function.

Fixes: 35e2b92344 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI")

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:52:02 +02:00
Michal Simek
cc9f55e241 arm64: zynqmp: Remove eeprom setting
By moving to DM_I2C there is no need to specify any eeprom configuration
because it is read from DT.

Reported-by: Sreeja Vadakattu <sreeja.vadakattu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:52:02 +02:00
Michal Simek
c19d4c72aa net: gem: Remove phy autodetection code
There is no reason to detect phy when core is doing it for us.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:52:02 +02:00
Siva Durga Prasad Paladugu
51c019ff8c net: zynq_gem: Modify phy supported features after max-speed was set
The phydev supported features were reset in phy_set_supported() so,
move the setting of driver supported features after this so that it
wont lost in phy_set_supported().

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:52:02 +02:00
Michal Simek
c8c5e2b84d Makefile: Prioritize external dtb if defined
Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-16 11:52:02 +02:00
Siva Durga Prasad Paladugu
31f7ce7f9b arm: zynq: Add an info message about post config
Post configuration cant be run at u-boot as u-boot
didn't has any info about the design.So,this patch
adds an info message that post config was not run
and needs to be run manually if needed.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Siva Durga Prasad Paladugu
c7490907d1 arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR
This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Melin Tomas
e8f4f1f5d4 ARM: zynq: fix environment command syntax
Update EXTRA_ENV_SETTINGS and related commands to use 'setenv'
instead of short name 'set' in commands.

E.g. in case command setexpr is enabled the short form does not work
properly as the name becomes ambigous.

Fixes error messages like:

    U-Boot> set
    Unknown command 'set' - try 'help'

Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Hannes Schmelzer
2aff722629 ARM: zynq: Add missing i2c get_rate for fixing i2c SPL
The commit 'f48ef0d81aa837a33020f8d61abb3929ba613774' did break I2C
support because requesting the clock for the I2C ip-block isn't
supported during SPL.

To fixup this we add support requesting clocks for:
- i2c0
- i2c1

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Siva Durga Prasad Paladugu
1922a7b39a arm64: xilinx: zynqmp: Remove unneeded configs
Remove unneeded configs from mini qspi configuration
so that it saves space for this mini configuration.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Siva Durga Prasad Paladugu
3b4146f133 arm64: zynqmp: Define label for flash node
Define a label for flash node so that it can be
referenced easily as required.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Siva Durga Prasad Paladugu
8bc8991f22 arm64: zynqmp: Add spi-flash compatible string to flash node
spi-flash compatible string is needed for reading tx and rx bus
widths, hence add this compatible string to flash node.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Michal Simek
ba4f52bd42 arm64: zynqmp: Add debug message about clearing BSS
Just have better view on system.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
T Karthik Reddy
958d1b1882 ARM: zynq: Check zynq aes & rsa command parameters count
This patch checks for zynq aes & rsa commands max parameters count. Also
checks minimum number of parameters count for aes command.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
T Karthik Reddy
be52372ff1 arm64: zynqmp: Use zynqmp_mmio_read/write functions
Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Siva Durga Prasad Paladugu
1a474381b6 spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz
This patch fixes the tap delay values to be set at 100MHz and 150MHz
as per TRM by fixing the if condition to use <= instead of <.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Michal Simek
d6cedcc0cd arm64: zynqmp: Disable WDT for zcu100
Do not enable WDT by default on this target because distributions are
not enabling watchdog driver to service it.

Feature has been enabled by:
"arm64: zynqmp: Enable cadence WDT for zcu100"
(sha1: 767afebbcd)

And WDT is still enabled in rebranded Avnet Ultra 96 board support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:34 +02:00
Michal Simek
963482120d test: py: Extend fpga test with fit image with external data
Images are created
mkimage -f fit.its -E  download-fit-external.ub

and test expects these entries.

env__fpga_under_test = {
    ...
    "mkimage_fit_external": download-fit-external.ub",
    "mkimage_fit_external_size": xxxxx,
    ...
}

Test download file and loads it to fpga.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-16 11:51:34 +02:00
Tien Fong Chee
3003c445b3 fpga: Replace char * with const char * for filename
Ensure the string for filename is always constant, otherwise it can be
corrupted by the writing.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:33 +02:00
Tien Fong Chee
9184c92f46 fpga: Add support for getting external data address and length
This function supports getting both data address and length for
existing FPGA subimage and FPGA external data.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-04-16 11:51:33 +02:00
Heiko Schocher
ac578e08b1 at91sam9260.dtsi: add some labels
add labels to rtc, pinctrl and watchdog node.

This makes it possible to reference the nodes
from board dts files.

Signed-off-by: Heiko Schocher <hs@denx.de>
2019-04-15 17:18:59 +03:00
Tom Rini
75ce8c938d Move to DM
-----------
 
 - DM support in sata
 - Toradex Board to DM
 - wandboard to DM
 - tbs2910 to DM
 - GE boards to DM
 - VHybrid boards to DM
 - DM_VIDEO for i.MX
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAly0NhIPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3XiUMALq2W4HPjFlDaVHpaxKIvZMkqAAjF7eE6M9l
 DWivSm/Anm5jeE2UM80FpV7npdkPMcOl2YdcIjg+jMKKP6DI+4N6gEhWvxX9mEoC
 RmR2nxGC/GIc0Blb4HU9V6xMkeR5jSAQ6bxZmX3IrnG6u67BIi4NmkNrT9gdQ+WT
 PkJf2Ai7DN7+epfOzjO0d/LjS3hAVb+nesHuxoVraElwc5sEMAnoD0vIMUrXceZ2
 +V6WiU1i9jeLj3fA8P+4o6wqQpxFLlJiuC0FUNKQH/kWIqX6MGrr9ElseLUV0O+Z
 LL5nqsuTgG/fAol1r71De49fiML2Pfx7ZkAZOJ1NMUOXUKw25ulO/wi0wg8t+l2Z
 2oAQ3S84RUVYX4MFLwxkBCq3uC9hvyCfWF1GmVLV6xSEulS6PnHx0FL6OTY4uB3h
 bmVs/mutwwqYBaaoqGG4sG5L7TVSG/JxNgTVNh3Aqj5a89Fd9us+nBhLhoq6xyVl
 cEf+/gPGQ97JEj9DolAPFIFQJBvL7g==
 =KLsH
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20190415' of git://git.denx.de/u-boot-imx

Move to DM
-----------

- DM support in sata
- Toradex Board to DM
- wandboard to DM
- tbs2910 to DM
- GE boards to DM
- VHybrid boards to DM
- DM_VIDEO for i.MX
2019-04-15 07:31:14 -04:00
Tom Rini
38f94d3539 Pull request for UEFI sub-system for v2019.07-rc1 (2)
In the aarch64 crash dump information about the loaded EFI images is added.
 
 In README.uefi the development target is for the UEFI subsystem is
 described as "Embedded Base Boot Requirements (EBBR) Specification"
 compliance.
 
 Several bug fixes are supplied.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAlyyzHEACgkQxIHbvCwF
 GsS+9Q/9HahVvxHFljI8ymxznml7AlFCrxWwcVo5HhftbGuQIgF3NMXRlsxmsSPM
 Z+Cc3EFni4EWWWe9yDMLqXV4NCd6bnfWYWP4UvbqAKCfeX8jScRyMypPnxZ3rNrg
 oe/8zDT9qXQnEah4sB+AQhar2VRTS1p97wKDObt3mj9c2g5pGL1zdejS/4SfnCd0
 a1BymV7p7fpykDjW8S0GQM56QAkbB9CJ4Q7nlPCDlspqJlQB318lWs46FfUn2Aue
 DNLm0uscrMZtEr/aAdT+r/96GIq4AVkexy7b5MZ0v/NDNAtmIqO1ORUmLSNSDfcM
 /cbtxq53VbeztMzMoYDdU0zNR//N4dL3GbSRKJulksvxeIExCp3dRV7gfTOwWq7J
 Lg/b43WJI1f2vgXDgEPddTO3E3SPjCGQcnCNOcVNNfTkyrtVaCmRYh69lV2BpKKF
 oQCYQyzS8yYLxj16YXixK9seyQYxh/vPYVT78ed5A8B1dmyxSQMnEJjY93jngj1g
 k5DRH9nnx12aeEqkhsWvVdHT0OBNj/+oZlzT3KGDcxhrDeZXAgqxAO1oPG85Wqnx
 kPeadyVD0T5Dd8fpMqF+tToB+GCbvyUVJsVlNqDSC7NslJ3AbxBKNDuEsMJlXgwL
 Yh4/lusg/YXzZ4ACWHgUnckZDVZGNj+58QRgEU+3mZinMjDS38E=
 =QdJl
 -----END PGP SIGNATURE-----

Merge tag 'efi-2019-07-rc1-2' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc1 (2)

In the aarch64 crash dump information about the loaded EFI images is added.

In README.uefi the development target is for the UEFI subsystem is
described as "Embedded Base Boot Requirements (EBBR) Specification"
compliance.

Several bug fixes are supplied.
2019-04-15 07:30:25 -04:00
Tom Rini
939803e130 - optional backlight PWM polarity config via polarity cell
- bug fix for ASCII characters > 127
 - ANSI sequence handling extensions (implement clear line,
   reverse video and relative cursor movement commands)
 - preparation for doing character set translations
 - left/right and up/down arrow keys translation to ANSI
   control sequences for cursor movement to fix selection
   with an USB keyboard in bootmenu
 - CONFIG_SYS_WHITE_ON_BLACK font scheme configuration for
   sunxi boards
 -----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCXLN1fg4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXJKfAJ4mlkJRm5oXcjjZqVkI+Qm1NdKpPACfUuvrDOgo
 MzubX1rLQS+h8BBlG+s=
 =7pd3
 -----END PGP SIGNATURE-----

Merge tag 'video-for-2019.07-rc1' of git://git.denx.de/u-boot-video

- optional backlight PWM polarity config via polarity cell
- bug fix for ASCII characters > 127
- ANSI sequence handling extensions (implement clear line,
  reverse video and relative cursor movement commands)
- preparation for doing character set translations
- left/right and up/down arrow keys translation to ANSI
  control sequences for cursor movement to fix selection
  with an USB keyboard in bootmenu
- CONFIG_SYS_WHITE_ON_BLACK font scheme configuration for
  sunxi boards
2019-04-15 07:30:07 -04:00
Soeren Moch
e0627f77f5 board: tbs2910: Remove CMD_FDT support in defconfig to reduce u-boot size
This fixes the build failure "u-boot.imx exceeds file size limit".

Signed-off-by: Soeren Moch <smoch@web.de>
2019-04-14 21:33:12 +02:00
Jagan Teki
a93a55044b arm64: allwinner: sun50i: Sync H6 dts(i) files from Linux
Usually the Linux dts changes were synced in specific tags in Allwinner,
to keep track for whats been synced so-far and plan for future syncs.

But this patch sync sun50i-h6* dts(i) files from Linux w/o any specific
tag since these dts(i) changes are required for new H6 boards support.

Linux commit details about the sun50i-h6* sync:
"arm64: dts: allwinner: h6: move MMC pinctrl to dtsi"
(sha1: 6ba2e45d57afdfd982d12f168edd6a79a65075d8)

Linux commit details about the sun8i-tcon-top.h sync:
"dt-bindings: display: sunxi-drm: Add TCON TOP description"
(sha1: 59a9c39544cd1e5952c2a33028d71aa8180648f8)

Part of the sync initiated by 'Clément Péron'.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-14 22:32:32 +05:30
Andre Przywara
7b64a70a3a sunxi: allow boards to de-select SYS_WHITE_ON_BLACK font scheme
In the sunxi-common.h config header we unconditionally define
CONFIG_SYS_WHITE_ON_BLACK, although it's actually a Kconfig option which
could be individually selected by a user.
Remove this #define from the header and let it default to "y" on sunxi
boards (like we do for other platforms).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-14 14:18:48 +02:00
Andre Przywara
c99ffd72ab usb: kbd: Properly translate up/down arrow keys
So far arrows key pressed on an USB keyboard got translated to some
low ASCII control sequences (Ctrl+N, Ctrl+P). Some programs understand
these codes, but the standard for those keys is to use ANSI control
sequences for cursor movement (ESC [ A).
Our own boot menu is a victim of this, currently we cannot change the
selection with an USB keyboard due to this.

Since we already implement a queue for USB key codes, we can just insert
the three character ANSI sequence into the key buffer. This fixes the
bootmenu, and is more universal for other users (UEFI) as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-04-14 14:18:48 +02:00