arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI

Replace SDHCI controller listing by Kconfig symbol to let SPL know that
this board is using multiple SDHCIs controllers.
Kconfig help message should explain why this is needed.
Origin symbols were used in full u-boot but with moving to distro boot
this was fixed already.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arch/arm/mach-zynqmp/Kconfig

@@ -99,6 +99,17 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
 config ZYNQ_SDHCI_MAX_FREQ
 	default 200000000
 
+config SPL_ZYNQMP_TWO_SDHCI
+	bool "Enable booting from both SDHCIs"
+	depends on SPL
+	help
+	  This option reflects that board has two SDHCI controllers which
+	  platform can use as boot device. This option ensures that SPL will
+	  setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for
+	  SDHCI0 controller. Platforms which have only one SDHCI controller
+	  shouldn't enable this option because it for software SDHCI0 or SDHCI1
+	  are both covered by BOOT_DEVICE_MMC1.
+
 config SPL_ZYNQMP_ALT_BOOTMODE
 	hex
 	default 0x0 if JTAG_MODE

arch/arm/mach-zynqmp/spl.c

@@ -85,7 +85,7 @@ u32 spl_boot_device(void)
 	case SD_MODE1:
 	case SD1_LSHFT_MODE: /* not working on silicon v1 */
 /* if both controllers enabled, then these two are the second controller */
-#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
+#if defined(SPL_ZYNQMP_TWO_SDHCI)
 		return BOOT_DEVICE_MMC2;
 /* else, fall through, the one SDHCI controller that is enabled is number 1 */
 #endif

configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig

@@ -7,6 +7,7 @@ CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xff000000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_ZYNQMP_USB=y
+CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y

include/configs/xilinx_zynqmp_zc1275_revB.h

@@ -8,8 +8,6 @@
 #ifndef __CONFIG_ZYNQMP_ZC1275_REVB_H
 #define __CONFIG_ZYNQMP_ZC1275_REVB_H
 
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1275_REVB_H */

include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h

@@ -9,9 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
 #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
 
-#define CONFIG_ZYNQ_SDHCI0
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */

include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h

@@ -9,8 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
 #define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
 
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */

include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h

@@ -10,8 +10,6 @@
 #ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
 #define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
 
-#define CONFIG_ZYNQ_SDHCI0
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */

include/configs/xilinx_zynqmp_zcu102.h

@@ -9,7 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZCU102_H
 #define __CONFIG_ZYNQMP_ZCU102_H
 
-#define CONFIG_ZYNQ_SDHCI1
 #define CONFIG_SPD_EEPROM
 #define CONFIG_DDR_SPD
 

include/configs/xilinx_zynqmp_zcu104.h

@@ -9,8 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZCU104_H
 #define __CONFIG_ZYNQMP_ZCU104_H
 
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZCU104_H */

include/configs/xilinx_zynqmp_zcu106.h

@@ -9,8 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZCU106_H
 #define __CONFIG_ZYNQMP_ZCU106_H
 
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZCU106_H */

include/configs/xilinx_zynqmp_zcu111.h

@@ -9,8 +9,6 @@
 #ifndef __CONFIG_ZYNQMP_ZCU111_H
 #define __CONFIG_ZYNQMP_ZCU111_H
 
-#define CONFIG_ZYNQ_SDHCI1
-
 #include <configs/xilinx_zynqmp.h>
 
 #endif /* __CONFIG_ZYNQMP_ZCU111_H */