Commit Graph

13928 Commits

Author SHA1 Message Date
Alexey Brodkin
7530bb2175 ARC: Make sure .ivt section is not purged by garbage collector
Fixes commit fac4790491 ("arc: Eliminate unused code and data with GCC's garbage collector"),
see [1].

Since in case of ARCv2 .ivt only contains addrresses of
interrupt/exception handlers linker doesn't understand that this section
actually make a lot of sense and decides to get rid of it if we use
"--gc-sections".

And KEEP does exactly this, see [2].

[1] http://git.denx.de/?p=u-boot.git;a=commit;h=fac4790491f69b29755d92db2cad508849573ff7
[2] https://sourceware.org/binutils/docs/ld/Input-Section-Keep.html#Input-Section-Keep

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Alexey Brodkin
d0a5023a35 ARC: Cache: Don't compare I$ and D$ line lengths
We don't care much about I$ line length really as there're
no per-line ops on I$ instead we only do full invalidation of it
on occasion of relocation and right before jumping to the OS.

Also as compared to Linux kernel where we don't support different
lengths of I$ and D$ lines in U-Boot we have to deal with such an
exotic configs if the target board is not supposed to run Linux kernel.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-31 20:13:29 +03:00
Eugeniu Rosca
507cef3d15 test: dm: Fix wrong aliases property names
After importing v4.17-rc1 Linux commit 9130ba884640 ("scripts/dtc:
Update to upstream version v1.4.6-9-gaadd0b65c987"), sandbox build
reports below warnings:

arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'
arch/sandbox/dts/test.dtb: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-'

Silent them by applying the 's/_/-/' substitution in the names of the
'fdt_dummy0', 'fdt_dummy1', 'fdt_dummy2', 'fdt_dummy3' properties.

Similar DTC warnings have been recently fixed in Linux kernel, e.g. via
v4.17-rc1 commit d366c30d19f4 ("ARM: dts: STi: Fix aliases property name
for STi boards").

If done alone, the DTS update generates a failure of the
`ut dm fdt_translation` unit test in sandbox environment as seen below:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
test/dm/test-fdt.c:444, dm_test_fdt_translation(): 0 == uclass_find_device_by_seq(UCLASS_TEST_DUMMY, 0, 1, &dev): Expected 0, got -19
Failures: 2
---<-snip->---

Fix this issue in place, by updating the "name" string in the
UCLASS_DRIVER(fdt_dummy) definition, so that it matches the newly
updated aliases properties. After that, the test passes:

$ ./u-boot -d arch/sandbox/dts/test.dtb
---<-snip->---
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
---<-snip->---

Fixes: e8d5291824 ("core: ofnode: Fix translation for #size-cells == 0")
Reported-by: Petr Vorel <pvorel@suse.cz>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-31 08:53:11 -04:00
Rajan Vaja
ecb4d7481e arm64: zynqmp: Add TTC clocks
PS clock(LPD_APB_CLK) is default clock for TTC. Add this clock
entry in TTC nodes.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
f0d56145d9 arm64: zynqmp: Disable WP on zcu111
On this board there is SD slot without WP connected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
3e98a9c416 arm64: zynqmp: Remove broken-cd from zcu100-revC
Card detect bit was broken on revA and it is working fine with revC
board that's why this property can be removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
ce236dce56 arm64: zynqmp: Fix address for tca6416_u97 chip on zcu104
I2c address is not 0x21 but 0x20. This patch is fixing both revA and
revC boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
3705dae164 arm64: zynqmp: Add ina226 to zcu104 revC
Add new ina226 chip present on i2c bus which wasn't on revA.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Ezequiel Garcia
c66f5620e6 arm: zynq: Add support for Bitmain Antminer S9 control board
This is control board on Bitmain Antminer S9.
There are 3 board variables with 256MB, 512MB and 1024MB DDR.
DDR memory is automatically detected with using get_with using
get_ram_size().

Bitmain is using 16MB space for FPGA which is handled via
reserved-memory. Also U-Boot is allocating 16B for storing bootcounts.
Watchdog is started but never service in U-Boot.

SPL MMC is working. SPL NAND is not working because it is not supported
as of now.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Ibai Erkiaga
7483969c55 arm: zynq: Add initial support for Avnet MiniZed
Initial support for Avnet MiniZed board. Tested UART1 (serial console),
QSPI(Flash), SDHCI1 (eMMC), USB.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Rajan Vaja
6189f76ae8 soc: zynqmp: Update required API version to 1.0
Existing EEMI version is to as 1.0 (available from xilinx v2018.1
version). Update required API version to match with EEMI API version.

New PMUFW version is required for operations with programmable logic.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
8dd94a8fe5 arm64: zynqmp: Get rid of emulation platforms
ZynqMP emulation platforms are no longer tested and supported that's why
remove macros and code around.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Michal Simek
d348beaa63 arm64: zynqmp: Show reset reason
Read reset reason reg and show it in log and also save it as variable.
Clearing reset reason when it is read to show only one status

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-31 13:50:39 +02:00
Tom Rini
8ada17dde8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Fix a conflict in drivers/spi/atcspi200_spi.c related to the riscv
  tree fixing a warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-30 14:51:37 -04:00
Tom Rini
964d4f7211 Merge git://git.denx.de/u-boot-riscv 2018-05-30 08:43:04 -04:00
Alex Kiernan
413b90777f ti: fastboot: Move weak overrides to board files
Overriding fastboot_set_reboot_flag() in arch/arm/mach-omap2/boot-common.c
leaves it applying all boards that derive from this, not just the ones which
have support for Android bootloader flow. Move the weak function override to
the relevant board files.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-30 11:59:21 +02:00
Alex Kiernan
8a65bd6372 fastboot: Rename fb_set_reboot_flag to fastboot_set_reboot_flag
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
all other fastboot code in the global name space. Fix the guards around
them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.

Move the weak implementation of fastboot_set_reboot_flag to fb_common.c
so we can call it from non-USB fastboot code.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
42d8dd4424 fastboot: Correct dependencies in FASTBOOT_FLASH
Ensure that when selecting FASTBOOT_FLASH you end up with a buildable
configuration. Prior to this you could select NAND without MTDPARTS
and end up with an image which (surprisingly) excluded NAND.

Also fix dependencies on FASTBOOT_GPT_NAME/FASTBOOT_MBR_NAME which require
you have EFI_PARTITION/DOS_PARTITION enabled.

Delete redundant FASTBOOT_FLASH_NAND_DEV from Kconfig - it was only ever
used as a guard and the value was ignored in all cases, we're using
FASTBOOT_FLASH_NAND as the guard now.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Alex Kiernan
312a10f16b fastboot: Move fastboot to drivers/fastboot
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.

Switch dependencies on FASTBOOT to USB_FUNCTION_FASTBOOT as anyone who wants
FASTBOOT before this series wants USB_FUNCTION_FASTBOOT. Split
USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-05-30 11:59:21 +02:00
Tom Rini
9c2369a554 Merge git://git.denx.de/u-boot-marvell 2018-05-29 11:01:46 -04:00
Ramon Fried
f035526624 mach-snapdragon: increase size of malloc pool
Pool size must be increased to support new additionals
drivers.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-29 11:01:37 -04:00
Ramon Fried
e9a1b65293 db820c: add dummy clock for uart node
The missing clock causes serial_msm driver probe to fail.
Added a dummy node so the probe succeeds, as the clock init
currently in db820c is empty.

Fixes: 11d59fe537 ("serial: serial_msm: fail probe if settings clocks fails")

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-29 11:01:34 -04:00
Rick Chen
7286e46a79 riscv: dts: Support cfi flash
Add nor node for cfi-flash driver and smc node
for smc(aftsmc020) controller.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:04 +08:00
Rick Chen
c14e90e844 riscv: dts: Sync DT with Linux Kernel
Use same dts to boot U-Boot and RISC-V
Linux Kernel v4.16-rc2 in ax25-ae350 platform.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:03 +08:00
Rick Chen
6f4dd62f33 riscv: cpu: nx25: Rename as ax25
Andes has rearranged the product combinations.
nx25 and ax25 both are RISC-V architecture cpu core.
But ax25 has MMU unit inside, and nx25 is not.

Cpu nx25 and platform ae250 are arranged in pairs.
Cpu ax25 and platform ae350 are arranged in pairs.

This patch will rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.

Then u-boot can boot linux kernel in ae350
platform reasonably.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:45:02 +08:00
Rick Chen
7215787c4e SPDX: Convert single license tags to Linux Kernel style
Fix license tags problem after apply patchs about
riscv: Enable efi_loader support.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
2018-05-29 14:44:21 +08:00
Rick Chen
6836adbe75 efi_loader: Enable RISC-V support
We have almost all pieces needed to support RISC-V UEFI binaries in place already.
The only missing piece are ELF relocations for runtime code and
data.

This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER configuration
switch on RISC-V platforms.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
b66babda45 riscv: Add board_quiesce_devices stub
This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
493d1e88b6 riscv: Add EFI application infrastructure
The hello world binary and a few selftests require to build EFI target
binaries, not just the EFI host environment.

This patch adds all required files to generate an EFI binary for
RISC-V.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
6cc1a2af46 riscv: Enable function sections
The linker can remove sections that are never addressed, so it makes a lot
of sense to declare every function as an individual section.

This reduces the output U-Boot code size by ~30kb for me.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Alexander Graf
a7f99e5dd7 riscv: Add setjmp/longjmp code
To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-05-29 14:43:12 +08:00
Ken Ma
592b4a7e97 ata: mvebu: move mvebu sata driver to drivers/ata directory
Currently mvebu sata driver is in arch/arm/mach_mvebu directory, this
patch moves it to drivers/ata directory with renaming "sata.c" to
"ahci_mvebu.c" which is aligned to Linux.
New ahci driver's kconfig option is added as AHCI_MVEBU which selects
SCSI_AHCI and is based on AHCI.

Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Konstantin Porotchkin
61dccf73d3 dts: mvebu: a80x0: Enable SD/eMMC interfaces
Enable SDHCI interface on AP and CP0 in A80x0 DTS files

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Evan Wang <xswang@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Evan Wang
f246648d37 mvebu: pinctrl: sync compatible string with Linux 4.17-rc4
For pinctrl driver of mvebu, the compatible strings
supported are defined differently from Linux version.
The patch aligned the compatible string with
Linux 4.17-rc4.

Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:05 +02:00
Chris Packham
17afbbf944 ARM: kirkwood: Add device-tree for keymile
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
04f5785ae3 ARM: kirkwood: Add device-tree for netspace & inetspace
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
4a54e54c97 ARM: kirkwood: Add device-tree for lschlv2 & lsxhl
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
6220ed46b5 ARM: kirkwood: Add device-tree for ds109
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
4bb0dea519 ARM: kirkwood: Add device-tree for dreamplug
Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Chris Packham
fbe502e9ab ARM: kirkwood: Add device-tree for d2net_v2 & net2big_v2
Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-05-29 08:33:03 +02:00
Jagan Teki
82843d8d52 arm64: allwinner: h5: orangepi-prime: Sync usb otg nodes from Linux
orangepi-prime has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
84c569ca2c arm64: allwinner: h5: orangepi-pc2: Sync usb otg nodes from Linux
orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
0107cd4ca7 arm64: allwinner: h5: orangepi-pc2: Order nodes in alphabetic
Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
426a234f5c ARM: dts: sun8i-h3: bananapi-m2-plus: Sync usb otg nodes from Linux
Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
90dd2756a0 arm64: allwinner: a64: bananapi-m64: Sync usb host nodes from Linux
Sync bananapi-m64 usb host nodes from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
b622e5a373 ARM: dts: sun8i: a83t: Sync usbphy node from Linux
Sync sun8i-a83t usbphy node details from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
737fd73010 arm64: allwinner: a64: bananapi-m64: Sync usb_otg node from Linux
Sync bananapi-m64 usb_otg node from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jun Nie
96c04aab58 sunxi: h3: Sync OTG and HCI nodes from Linux DT
Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
f5871a66fd sunxi: Drop legacy usb_phy.c
Allwinner PHY USB code is now part of generic-phy framework,
so drop existing legacy handling like arch/arm/mach-sunxi.c
and related code areas.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
dd3228170a usb: sunxi: Switch to use generic-phy
Allwinner USB PHY handling can be done through driver-model
generic-phy so add the generic-phy ops to relevant places
on host and musb sunxi driver and enable them in respective
SOC's.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Chen-Yu Tsai
fef73766d9 sunxi: clock: Fix OHCI clock gating for H3/H5
Clock gating bits on H43/H5 were wrong, fix them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Jagan Teki
26fc4d6c51 sunxi: clock: Fix clock gating for H3/H5/A64
clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
2018-05-28 16:40:43 +05:30
Patrick Delaunay
7f7deb0c72 stm32mp1: use OTP to configure MAC address and serial number
Use OTP57 and 58 for MAC address
- OTP57 = MAC address  bits [31:0]
- OTP58 = MAC address  bit  [47:32] stored in OTP  LSB's

Use manufacture information in OTP13 to OTP15 to build unique
chip id saved in env variable "serial#"
(used for USB device enumeration)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
c3600e1f92 stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
19f589923a stm32mp1: add bsec driver
Add a MISC driver with read and write access to BSEC IP
(Boot and Security and OTP control)
- offset 0: shadowed values
- offset 0x80000000: OTP fuse box values (SAFMEM)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
de20e43794 stm32mp1: remove the second TAMP_BOOT_CONTEXT update
The register TAMP_BOOT_CONTEXT is already updated in
get_bootmode() in cpu.c and no need to be done
twice.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Patrick Delaunay
320d266368 stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)

To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:18 -04:00
Radoslaw Pietrzyk
246a5e5fc2 ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000

Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2018-05-26 18:19:17 -04:00
Ramon Fried
9558ddab96 db410: added pinctrl node and serial bindings
Added TLMM pinctrl node for pin muxing & config.
Additionally, added a serial node for uart.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-26 18:19:16 -04:00
Ramon Fried
ad97051b7f mach-snapdragon: Introduce pinctrl driver
This patch adds pinmux and pinctrl driver for TLMM
subsystem in snapdragon chipsets.
Currently, supporting only 8016, but implementation is
generic and 8096 can be added easily.

Driver is using the generic dt-bindings and doesn't
introduce any new bindings (yet).

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 18:19:16 -04:00
Ramon Fried
640dc34942 mach-snapdragon: Fix UART clock flow
UART clock enabling flow was wrong.
Changed the flow according to downstream implementation in LK.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-05-26 18:19:11 -04:00
Ramon Fried
ffada23ca7 db820c: set clk node to be probed before relocation
The clock and serial nodes are needed before relocation.
This patch ensures that the msm-serial driver will probe
and provide uart output before relocation.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-05-26 12:46:50 -04:00
Miquel Raynal
b91ad16a69 sandbox: dts: add Sandbox TPMv2.x node
This node declares the presence of the Sandbox TPMv2.x emulated chip,
available for testing.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-05-25 20:13:00 -04:00
Maxime Ripard
3def2f8dbb Revert "sunxi: binman: Add U-Boot binary size check"
This reverts commit 819f1e081c.

This check was introduced in order to cope with the size limitation we had
when we were still using the raw environment in MMC. However, this
introduces padding as well, which can result in an overly huge binary if
one wants to flash the environment to some other location.

Since we now have a FAT-based environment, this check is not so useful
anymore, so we can just drop it.

Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Måns Rullgård <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-25 14:55:07 +05:30
Eugeniy Paltsev
429fa25e17 ARC: init debug uart in early common arc code
The debug UART is intended for use very early in U-Boot to debug
problems before serial drivers are up.

Call debug_uart_init right before board_init_f.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-05-24 15:59:17 +03:00
Heinrich Schuchardt
bd2a13f329 arm: print instructions pointed to by pc
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helful to know the instructions pointed to by the
program counter. This patch adds the missing output.

A possible output is:
    Code: e1c560d0 e12fff1e e120077b e12fff1e (e7f7defb)

The parentheses indicate the instruction causing the exception.

The output can be disassembled using the decodecode script provided
by the Linux kernel project.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-05-23 22:06:41 -04:00
Michal Simek
d0f855f221 arm64: timer: Create timer_get_bootus for bootstage support
Implement timer_get_boot_us() based on available functions to support
bootstage command.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-05-23 22:06:41 -04:00
Tom Rini
ea37f0b312 arm: armv7m: Clean up some thumb / compiler flag options
- The correct way to build with thumb mode is to select SYS_THUMB_BUILD
- We should be setting -march=armv7-m in arch/arm/Makefile not the
  sub-config.mk file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-23 13:03:42 -04:00
Tom Rini
f58e94602e at91: Minor tweaks to SPL logic for space savings on smartweb
- spl_board_init is empty on smartweb so drop that function
- When CONFIG_AT91SAM9_WATCHDOG is set we do not disable the watchdog in
  SPL and instead let full U-Boot handle it.  Instead of an empty
  function just do not call a function.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-22 22:08:57 -04:00
Masahiro Yamada
c3d3e2a1ef ARM: dts: uniphier: sync with Linux 4.17-rc6
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Masahiro Yamada
8c09f1f4fc ARM: uniphier: rename environment variable fdt_file to fdtfile
For booting Linux in the generic distro mechanism, cmd/pxe.c
retrieves the FDT file name from "fdtfile" environment variable.

Rename "fdt_file" to "fdtfile" for easier migration to distro boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
f6acbf88e4 ARM: dts: uniphier: change phy-mode to 'internal' for LD11
Change the phy-mode property to 'internal' that means to use a built-in PHY
implemented on LD11 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
3c0fa6ce13 ARM: dts: uniphier: add clock-names and reset-names to ethernet node
Add clock-names and reset-names because this node recognizes multiple
clocks and resets.  ("ether", and so on, for each)

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
28cd3d2929 ARM: dts: uniphier: add required clocks and resets to Pro4 ethernet node
The GIO clock/reset, another MAC clock, and the PHY clock are required
for the ethernet of Pro4 SoC.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Kunihiko Hayashi
69b3d4e930 ARM: dts: uniphier: add syscon-phy-mode property to each ethernet node
Add syscon-phy-mode property specifying a phandle of system controller
to each ethernet node.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-23 00:32:39 +09:00
Tom Rini
624d2cae34 SPDX: Fixup SPDX tags in a few new files
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-20 09:47:45 -04:00
Tom Rini
bea1649cd9 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-05-20 09:44:38 -04:00
Tom Rini
56932e84ea Merge branch 'master' of git://git.denx.de/u-boot-usb 2018-05-20 09:44:13 -04:00
Tom Rini
904e546970 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-05-20 09:44:05 -04:00
Marek Vasut
232a1a5f8f ARM: rmobile: Unify Gen2 Makefile entry
Drop per-SoC Makefile entries and replace them with one unified entry
now that the PFC tables are gone. Shuffle the Makefile around a bit
to make it more organized.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
5ec1fd8e93 ARM: rmobile: Drop old R8A7794 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
a67a02d26d ARM: rmobile: Drop old R8A7793 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
be0fc10c07 ARM: rmobile: Drop old R8A7792 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
3bb2ff3426 ARM: rmobile: Drop old R8A7791 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
70b5de78ea ARM: rmobile: Drop old R8A7790 PFC tables
All the boards use new modern PFC framework, the old PFC tables
are no longer used, so remove them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Marek Vasut
e9c891ff93 ARM: rmobile: Update V2H Blanche
The V2H Blanche port was broken since some time. This patch updates
the V2H Blanche port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-05-20 12:06:55 +02:00
Tom Rini
855ff8e6dd Fixup various SPDX tags from the latest merge
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-18 17:56:50 -04:00
Michal Simek
b4af64fdfd arm64: zynqmp: Use DWC3 generic driver and DM_USB
Remove harcoded XHCI lists and detect mode, speed based on DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Serial-changes: 2
- Remove also XHCI macros from hardware.h
- Remove additional new line in zcu106
2018-05-18 13:23:15 +02:00
Tom Rini
5f78786499 Merge git://git.denx.de/u-boot-imx 2018-05-18 07:11:11 -04:00
Ley Foon Tan
00f7ae6138 arm: dts: socfpga: stratix10: update dtsi and dts
Update dtsi and dts files for resets, phy node and other properties.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
5fb033a336 arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
conditional build in order this file can by shared across other SOCFPGAs.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
73175d04a9 arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Add pinmux driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:48 +02:00
Ley Foon Tan
3607a8084a arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Add Reset Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ley Foon Tan
508791a035 arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Add Clock Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ley Foon Tan
641f7470b6 arm: socfpga: stratix10: Add watchdog and firewall base addresses
Add the base address for watchdog and firewall.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-05-18 10:30:47 +02:00
Ben Kalo
4916388a39 ARM: socfpga: Fix Documentation errors in scu_registers
According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
Access Control register offset is 0x50.

Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
011fa5f33d ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
SoC FPGA info is required in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
c960ef29cd ARM: socfpga: Adding clock frequency info for U-Boot
Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
901af3e903 configs: Add DDR Kconfig support for Arria 10
This patch enables DDR Kconfig support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
2018-05-18 10:30:47 +02:00
Tien Fong Chee
5658a299bd ARM: socfpga: Add DDR driver for Arria 10
Add DDR driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
2018-05-18 10:30:47 +02:00