sunxi: clock: Fix clock gating for H3/H5/A64

clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jun Nie <jun.nie@linaro.org>
This commit is contained in:
Jagan Teki 2018-05-07 13:03:21 +05:30
parent 97202dd6ec
commit 26fc4d6c51

View File

@ -270,21 +270,27 @@ struct sunxi_ccm_reg {
#define AXI_GATE_OFFSET_DRAM 0
/* ahb_gate0 offsets */
#define AHB_GATE_OFFSET_USB_OHCI1 30
#define AHB_GATE_OFFSET_USB_OHCI0 29
#ifdef CONFIG_MACH_SUNXI_H3_H5
/*
* These are EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG) we call
* them 0 - 2 like they were called on older SoCs.
*/
#define AHB_GATE_OFFSET_USB_OHCI0 28
#define AHB_GATE_OFFSET_USB_EHCI2 27
#define AHB_GATE_OFFSET_USB_EHCI1 26
#define AHB_GATE_OFFSET_USB_EHCI0 24
#elif defined(CONFIG_MACH_SUN50I)
#define AHB_GATE_OFFSET_USB_OHCI0 29
#define AHB_GATE_OFFSET_USB_EHCI0 25
#else
#define AHB_GATE_OFFSET_USB_OHCI1 30
#define AHB_GATE_OFFSET_USB_OHCI0 29
#define AHB_GATE_OFFSET_USB_EHCI1 27
#define AHB_GATE_OFFSET_USB_EHCI0 26
#endif
#ifndef CONFIG_MACH_SUN8I_R40
#ifdef CONFIG_MACH_SUN50I
#define AHB_GATE_OFFSET_USB0 23
#elif !defined(CONFIG_MACH_SUN8I_R40)
#define AHB_GATE_OFFSET_USB0 24
#else
#define AHB_GATE_OFFSET_USB0 25