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https://github.com/brain-hackers/u-boot-brain
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According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers Access Control register offset is 0x50. Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> |
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arc | ||
arm | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
powerpc | ||
riscv | ||
sandbox | ||
sh | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig |