Commit Graph

17888 Commits

Author SHA1 Message Date
Suman Anna
6aa3b740c3 remoteproc: k3-r5: Add support for J7200 R5Fs
The K3 J7200 SoC family has a revised R5F sub-system and contains a
subset of the R5F clusters present on J721E SoCs. The integration of
these clusters is very much similar to J721E SoCs otherwise.

The revised IP has the following two new features:
 1. TCMs are auto-initialized during module power-up, and the behavior
    is programmable through a MMR bit controlled by System Firmware.
 2. The LockStep-mode allows the Core1 TCMs to be combined with the
    Core0 TCMs effectively doubling the amount of TCMs available.
    The LockStep-mode on previous SoCs could only use the Core0 TCMs.
    This combined TCMs appear contiguous at the respective Core0 TCM
    addresses.

Add the support to these clusters in the K3 R5F remoteproc driver
using J7200 specific compatibles and revised logic accounting for
the above IP features/differences.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-09-15 18:51:53 +05:30
Andre Heider
e79c59c0e2 mmc: xenon_sdhci: Add missing common host capabilities
Use mmc_of_parse() to set the common host properties. That includes
"bus-width", so parsing it can be removed from the driver.

But more importantly, "non-removable" is now respected, which fixes
the usage of eMMC.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Marek Behún <marek.behun@nic.cz>
2020-09-15 10:15:56 +08:00
Manivannan Sadhasivam
8505147403 mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
Since the introduction of 'get_cd' callback in sdhci core,
dragonboard410c's MMC interface is broken. It turns out that 'get_cd'
callback checks for the host_caps for validating the chip select. And
since the msm_sdhci driver is not parsing the host_caps from DT, not
all of the cababilities are parsed properly. This results in the MMC
interfaces to be broken.

Hence, fix this by adding a call to 'mmc_of_parse' during driver probe.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Tested-by: Aníbal Limón <anibal.limon@linaro.org>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-09-15 10:13:37 +08:00
T Karthik Reddy
1e2c5bb9e7 mtd: nand: Fix nand write error with bad block addresses above 32-bit
Nand writes should skip the bad blocks with "nand write" command.
In case of bad blocks with above 32-bit address, nand_block_isbad()
returns false due to truncated bad block address.

In below code segment,

	if (nand_block_isbad(mtd, offset & ~(mtd->erasesize - 1)))

offset is 64-bit and mtd->erasesize is 32-bit, hence the truncation is
happening. Cast 'mtd->erasesize' with loff_t to fix this issue.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-11 17:13:56 -04:00
Chuanjia Liu
9250d0bad5 PCI: mediatek: Release the resource when PCIe enable port fail
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-10 15:32:09 -04:00
Chuanjia Liu
df85e9576c PCI: mediatek: Release the resource when PCIe enable port fail
On the mt7623 platform, if one port enable fail and other port
enable succeed. It will hang on when using pci enum
because the resource was not released correctly.

Signed-off-by: Chuanjia Liu <Chuanjia.Liu@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-09-10 11:17:46 -04:00
Ryan Chen
c39c9a94cb clock:aspeed: Sync with Linux kernel clock header define
v2: modify title description aspeed:clock -> clock:aspeed

Use kernel include/dt-bindings/clock/aspeed-clock.h define
for clock driver.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2020-09-09 16:57:35 -04:00
Ryan Chen
15b87feb2b cosmetic: aspeed: ast2500: Rename clock header
Rename the ast2500-scu.h to aspeed-clock.h.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
2020-09-09 16:57:35 -04:00
Jason Wessel
34873f46ba bcmgenet: Add support for rgmii-rxid
The commit 57805f2270 ("net: bcmgenet: Don't set ID_MODE_DIS when
not using RGMII") needed to be extended for the case of using the
rgmii-rxid.  The latest version of the Rasbperry Pi4 dtb files for the
5.4 now specify the rgmii-rxid.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:48 +02:00
Jason Wessel
ac458dc823 bcmgenet: fix DMA buffer management
This commit fixes a serious issue occurring when several network
commands are run on a raspberry pi 4 board: for instance a "dhcp"
command and then one or several "tftp" commands. In this case,
packet recv callbacks were called several times on the same packets,
and send function was failing most of the time.

note: if the boot procedure is made of a single network
command, the issue is not visible.

The issue is related to management of the packet ring buffers
(producer / consumer) and DMA.
Each time a packet is received, the ethernet device stores it
in the buffer and increments an index called RDMA_PROD_INDEX.
Each time the driver outputs a received packet, it increments
another index called RDMA_CONS_INDEX.

Between each pair of network commands, as part of the driver
'start' function, previous code tried to reset both RDMA_CONS_INDEX
and RDMA_PROD_INDEX to 0. But RDMA_PROD_INDEX cannot be written from
driver side, thus its value was actually not updated, and only
RDMA_CONS_INDEX was reset to 0. This was resulting in a major
synchronization issue between the driver and the device. Most
visible behavior was that the driver seemed to receive again the
packets from the previous commands (e.g. DHCP response packets
"received" again when performing the first TFTP command).

This fix consists in setting RDMA_CONS_INDEX to the same
value as RDMA_PROD_INDEX, when resetting the driver.

The same kind of fix was needed on the TX side, and a few variables
had to be reset accordingly (c_index, tx_index, rx_index).

The rx_index and tx_index have only 256 entries so the bottom 8 bits
must be masked off.

Originated-by: Etienne Dublé <etienne.duble@imag.fr>
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Tested-by: Petr Tesarik <ptesarik@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-09-08 16:43:02 +02:00
Patrick Delaunay
c1e1dbb8f3 usb: musb-new: sunxi: change trace level for phy errors managed by uclass
As the error message is now displayed by generic phy functions,
the dev_err/pr_err can be change to dev_dbg/pr_debug.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Patrick Delaunay
fc8ead1a0a ata: dwc-ahci: change trace level for phy errors managed by uclass
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Patrick Delaunay
890fc370a9 usb: host: ehci-hcd: change trace level for phy errors managed by uclass
As the error message is now displayed by generic phy functions,
the pr_err can be change to pr_debug.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Patrick Delaunay
3b417a7d82 usb: host: ohci: change trace level for phy errors managed by uclass
As the error message is now displayed by generic phy functions,
the dev_err can be change to dev_dbg.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Patrick Delaunay
2041ae5a5a phy: generic: add error trace to detect PHY issue in uclass
Add an error trace for PHY errors directly in generic phy
functions provided by PHY uclass.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-08 08:46:32 -04:00
Tom Rini
314b9b4a38 Merge branch 'remove-config-nr-dram-banks-v9-2020-08-26' of https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next 2020-09-07 14:31:00 -04:00
zachary
7757c85199 phy: marvell: a3700: add sata comphy on lane 2 with invert option
- This patch moves sata phy powerup from dedicate phy to compphy
  and adds invert option for sata powerup routine.

Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary <zhangzg@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider <a.heider@gmail.com>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-09-04 14:02:00 +02:00
Tom Rini
9bfb567e5f Merge branch 'master' of git://git.denx.de/u-boot-usb
- Mostly DFU fixes and r8152 fixes
2020-09-03 09:48:28 -04:00
Tom Rini
7f4d3c0445 Merge branch 'master' of git://git.denx.de/u-boot-sh
- SH serial bugfix
2020-09-03 09:00:35 -04:00
Gary Bisson
293a6dfeb9 fastboot: getvar: fix partition-size return value
The size returned by 'getvar partition-size' should be in bytes, not in
blocks as fastboot uses that value to generate empty partition when
running format [1].

Note that the function was already returning the proper size in bytes
for NAND devices (see struct part_info details).

[1]
https://android.googlesource.com/platform/system/core/+/refs/heads/android10-release/fastboot/fastboot.cpp#1500

Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
2020-09-01 14:47:43 +02:00
yurii.pidhornyi
64af06ce91 fastboot: Fix fastboot reboot fail by changing functions order
It was revealed that when the fastboot_tx_write_str function is called
without the previously initialized fastboot_func->in_req->complete field,
a copy of in_req will be sent to the I/O requests queue without
an initialized field.

Moving a piece of code with the initializing of the
fastboot_func->in_req->complete field above transmit_tx allows to solve
this problem.

Fixes: 65c96757fe "usb: fastboot: Convert USB f_fastboot to shared fastboot"
Signed-off-by: yurii.pidhornyi <yurii.pidhornyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
405217a033 f_sdp: Change bInterval of interrupt endpoint to 3
Since the USB HID limits the maximum bandwidth(3072) for interrupt
endpoint transfers, when the bInterval set to 1, we can only support 3
boards to run sdp at the same time. In order to support more boards,
change the bInterval of interrupt endpoint to 3, which will not affect
the transmission speed.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Sherry Sun
9e06c5c55a f_sdp: Add EP1_OUT as default data receive pipe in sdp
EP0 has been used to transfer file data in sdp before, but the max
packetsize of ep0 is 64 bytes. So in order to improve the file transfer
speed, here add the EP1_OUT interrupt endpoint which max packetsize is
set to 1024 byte.

After testing, it turns out that using ep1out is twice as fast as using
ep0 while receiving data in sdp.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Peng Fan
b0e9f3e593 f_sdp: Support searching and loading FIT or container image
Add support to f_sdp to search and load iMX8 container image or iMX8M
FIT image by new UUU command SDPV.

When using the SDPV, the uuu will continue to send out data after first
level boot loader used by ROM. This means uuu won't skip to the offset
of the second boot loader, and the padding data before second boot loader
will be sent out. So we have to search the FIT header or container header
in the buffer that SDP received.

Also change to more common method to exit f_sdp handler not depending on
SPL_FIT_FOUND flag because container loader won't set this.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
5dee7f0b02 f_sdp: Fix wrong usb request size
Because the buffer length of sdp usb request is 65, we have to allocate
65 bytes not 64 bytes. Otherwise there is potential buffer overflow.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Ye Li
d10d429112 f_sdp: Add high speed endpoint descriptor
Add HS endpoint descriptor for SDP. So that we can use high speed endpoint,
and the SDP device can send packet with 512 byte size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-09-01 14:47:43 +02:00
Jassi Brar
7ed4eac43d usb: max3420: add the gadget driver
MAX3420 implements FullSpeed USB Device over SPI.
Another version MAX3421, also implements USB Host mode.
This driver should be good for the device mode of max3421 as well.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
0ebf9842e5 fastboot: Add default fastboot_set_reboot_flag implementation
Default implementation of fastboot_set_reboot_flag function that depends
on "bcb" commands could be used in general case if there are no need to
make any platform-specific implementation, otherwise it could be
disabled via Kconfig option FASTBOOT_USE_BCB_SET_REBOOT_FLAG.

Please note that FASTBOOT_USE_BCB_SET_REBOOT_FLAG is mutually exclusive
with some platforms which already have their own implementation of this
function.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
2b2a771b40 fastboot: Add support for 'reboot fastboot' command
Android 10 adds support for dynamic partitions and in order to support
this userspace fastboot must be used[1]. New tool fastbootd is
included into recovery.

Userspace fastboot works from recovery and is launched if:
1) - Dynamic partitioning is enabled
2) - Boot control block has 'boot-fastboot' value into command field
The bootloader is expected to load and boot into the recovery image
upon seeing boot-fastboot in the BCB command. Recovery then parses the
BCB message and switches to fastbootd mode[2].

Please note that boot script is expected to handle 'boot-fastboot'
command in BCB and load into recovery mode.

Bootloader must support 'reboot fastboot' command which should reboot
device into userspace fastboot to accomodate those changes[3].

Another command that bootloader must support[3] is 'reboot recovery'. This
command should simply reboot device into recovery mode.

[1] - https://source.android.com/devices/bootloader/fastbootd
[2] - https://source.android.com/devices/bootloader/fastbootd#unified_fastboot_and_recovery
[3] - https://source.android.com/devices/bootloader/fastbootd#modifications_to_the_bootloader

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Change-Id: I9d2bdc9a6f6f31ea98572fe155e1cc8341e9af76
2020-09-01 14:47:43 +02:00
Roman Kovalivskyi
851737ab89 fastboot: Extend fastboot_set_reboot_flag with reboot reason
Extend fastboot_set_reboot_flag arguments with reboot reason so that
it could handle different reboot cases in future.

Signed-off-by: Roman Kovalivskyi <roman.kovalivskyi@globallogic.com>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
73f4ebb659 dfu: fix dfu tftp on sandbox
The environment variable loadaddr is in the virtual address space of the
sandbox. To get the actual memory address where the FIT image has been
loaded we have to convert this address according to the memory mapping of
the sandbox.

Equally the addresses in the *.its file have to be converted when used in
the dfu_ram driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Heinrich Schuchardt
40c79420d0 dfu: DFU_MTD depends on CMD_MTDPARTS
Function mtdparts_init() is needed for the DFU MTD driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-01 14:47:43 +02:00
Filip Brozovic
a17c0cb85e fastboot: Support defining raw partitions without a partition table
Add support for defining raw fastboot partitions in eMMC by specifying
the offset and size in an environment variable. Optionally, the eMMC
hardware partition number may also be specified.

This makes it possible to e.g. update only part of the eMMC boot
partition, instead of having to write the entire partition.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2020-09-01 14:47:43 +02:00
Ye Li
1468a1cc72 usb: ci_udc: Add function to remove usb device
When unregister gadget driver in ci_udc, the usb device is not
removed or stop. This causes next "usb start" fails to work.

Add a new interface "usb_remove_ehci_gadget" in usb-uclass to
remove the usb device for DM driver. Using "usb_lowlevel_stop" for
non-DM driver.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Ye Li
213fa47dac usb: gadget: Fix controller index in UMS
The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
this causes problem while CDNS3 USB controller index is 1.
Modify the API of fsg to pass the controller index.

Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-09-01 14:47:43 +02:00
Hayes Wang
3a41086f6a eth/r8152: support RTL8153B/RTL8154B
This is used to support RTL8153B and RTL8154B.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
9f6142aa0a eth/r8152: modify rtl_clear_bp function
The original rtl_clear_bp() is used to clear the firmware of both
PLA and USB MCU. The new one could clear the firmware of PLA or
USB independently. It is unnecessary to clear firmware, if there
is no one to be updated.

Besides, clear the firmware by writing the relative registers in
bulk.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
16b9417b6a eth/r8152: reset PHY after setting it
Some settings of PHY have to work after resetting PHY.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Hayes Wang
d74a76234f eth/r8152: reset bmu after disabling Tx/Rx
Reset bmu after disabling Tx/Rx. This is used to clear the FIFO of
Tx/Rx. The remained data may be transferred after Tx/Rx is re-enabled.
And it results in garbage data.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-09-01 14:47:36 +02:00
Marek Vasut
f5ba5c90d4 serial: sh: Improve FIFO empty check on RX
If the SCIF is receiving data quickly enough, it may happen that the
SCxSR_RDxF flag is cleared in sh_serial_getc_generic(), while the
FIFO still contains data. If that happens, the serial_getc_check()
reports no data in the FIFO as the flag is no longer set. Add one
more check, if the SCxSR_RDxF is not set, read out the FIFO level
and if there are still characters in the FIFO, permit reading them
out.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-09-01 14:46:41 +02:00
Simon Glass
0a0cdeceec x86: pinctrl: Fix 'relatove' typo
Fix this typo in the Kconfig help.

Suggested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-01 17:00:27 +08:00
Tom Rini
6ade057e37 Merge tag 'ti-v2020.10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Update to ABI 3.0
- Fix i2c write in eeprom driver
2020-08-31 13:06:26 -04:00
Pali Rohár
835d969c1f arm64: a37xx: pci: Depends on DM_GPIO
For proper initialization of aardvark pci driver it is required to
de-assert reset GPIO. So depeneds on DM_GPIO option.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Evan Wang
91b85e25b6 mmc: xenon: set signal voltage and max base clock
- The SDIO signal voltage and max base clock frequency
  setting are missing in driver, which causes SDIO
  not working.
- The patch adds SDIO signal voltage switch support,
  which is based on regulator-gpio of vqmmc-supply, and
  sets the max base clock frequency.
- Fix the zero clock value in call to sdhci_setup_cfg()
  function.

Change-Id: I79c8860c65b8db166f4f70db56ede4097f71f1fa
Signed-off-by: Evan Wang <xswang@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/53589
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
[pali: Amended fixup patch]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
828d326216 arm64: a37xx: pci: Assert PERST# signal when unloading driver
This change ensures that PCIe card is put into reset state when U-Boot
stops using it.

DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback
prior booting Linux kernel.

Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# signal
prior initializing it. If it does not issue reset then some PCIe cards
(specially Compex WiFi cards) are not detected at all.

Putting PCIe card into reset state prior booting Linux kernel would ensure
that card would be properly reset at time when Linux kernel starts
initializing pci-aardvark driver.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Pali Rohár
563b85bd88 arm64: a37xx: pci: Make PCIe Reset GPIO DT compatible with Linux kernel DT
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Tested-by: Andre Heider <a.heider@gmail.com>
2020-08-31 14:45:53 +02:00
Lokesh Vutla
4986b15485 firmware: ti_sci: Drop unused structure ti_sci_rm_type_map
struct ti_sci_rm_type_map is no longer used. Drop its definition and its
declarations.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:39 +05:30
Lokesh Vutla
2fe03a1c82 firmware: ti_sci: drop the device ids to resource id translation table
With ABI 3.0, sysfw deprecated special resource types used for AM65x
SoC. Instead started using device id as resource type similar to the
convention used in J721E SOC.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-08-31 14:39:38 +05:30
Michal Simek
a261fdce38 pci: kconfig: Setup proper dependency for PCIE_ROCKCHIP
There is missing dependency for PCIE_ROCKCHIP which selects
PHY_ROCKCHIP_PCIE which directly depends on ARCH_ROCKCHIP.

WARNING: unmet direct dependencies detected for PHY_ROCKCHIP_PCIE
  Depends on [n]: ARCH_ROCKCHIP [=n]
  Selected by [y]:
  - PCIE_ROCKCHIP [=y] && PCI [=y]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-08-27 11:20:33 -04:00
Ruben Di Battista
67e62c7468 drivers: usb: Fix config indentation
The indentation was messing up with the scripts/build-whitelist.sh that
was marking SYS_USB_EVENT_POLL_VIA_INT_QUEUE (and probably also the
other indented options) erroneously as ad-hoc configure option with the
following error:

```
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
```
2020-08-27 11:20:33 -04:00
Stefan Roese
063d547cac video: cfb_console.c: Use bi_dram[] values on all platforms
All platforms support bi_dram[] since quite some time. Lets remove the
and bi_memsize values completely.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-26 09:19:50 +02:00
Stefan Roese
dfaf6a5797 CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-26 09:19:16 +02:00
Tom Rini
9f9ecd3e4d Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Add basic Marvell/Cavium OcteonTX/TX2 support (Suneel)
- Infrastructure changes to PCI uclass to support these SoC's (Suneel)
- Add PCI, MMC & watchdog driver drivers for OcteonTX/TX2 (Suneel)
- Increase CONFIG_SYS_MALLOC_F_LEN for qemu-x86 (Stefan)
2020-08-25 13:38:29 -04:00
Tom Rini
ec54217ddc Merge tag 'i2c-bugfixes-for-v2020.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2020.10
- fix some issues with octeon_i2c driver on ARM Octeon TX2
- fix link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
2020-08-25 08:19:41 -04:00
Tom Rini
078656186f Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Sipeed Maix support S-mode.
- Provide command sbi.
- Use fdtdec_get_addr_size_auto_parent to get fu540 cache base address.
- Fix a compiler error with CONFIG_SPL_SMP=n.
- Fix sifive ram driver 32 compiler warnings.
- Fix kendryte/pll.h redefine nop() warning.
2020-08-25 08:18:50 -04:00
Suneel Garapati
af6ba90048 watchdog: Add reset support for OcteonTX / TX2
Adds support for Core 0 watchdog poke on OcteonTX and OcteonTX2
platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
708598997d mmc: Add MMC controller driver for OcteonTX / TX2
Adds support for MMC controllers found on OcteonTX or
OcteonTX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Peng Fan <peng.fan@nxp.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
638d705a54 pci: Add PCI controller driver for OcteonTX / TX2
Adds support for PCI ECAM/PEM controllers found on OcteonTX
or OcteonTX2 SoC platforms.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
3f6f0cd8fd ata: ahci: Add BAR index quirk for Cavium PCI SATA device
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 08:01:16 +02:00
Suneel Garapati
f0c369284d pci: pci-uclass: Check validity of ofnode
Add check if the referenced ofnode is valid.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
a3fac3f395 pci: pci-uclass: Add support for Alternate-RoutingID capability
If ARI capability is found on device, use it to update next function
number in bus scan and also helps to skip unnecessary bdf scans.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
51eeae91c5 pci: pci-uclass: Add VF BAR map support for Enhanced Allocation
Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
b8852dcfcb pci: pci-uclass: Add support for Single-Root I/O Virtualization
SR-IOV - Single Root I/O Virtualization
PF - Physical Function VF - Virtual Function

If SR-IOV capability is present, use it to initialize Virtual Function
PCI device instances. pci_sriov_init function will read SR-IOV
registers to create VF devices under the PF PCI device and also bind
driver if available. This function needs to be invoked from Physical
function device driver which expects VF device support, creating
minimal impact on existing framework.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
636cc1773a pci: pci-uclass: Add support for Enhanced Allocation in Bridges
If Enhanced Allocation capability is present in bridges, use it
to read the fixed sub-ordinate bus number.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Suneel Garapati
4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions
Enable PCI memory regions in ranges property to be of multiple entry.
This helps to add support for SoC's like OcteonTX/TX2 where every
peripheral is on PCI bus.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 08:01:16 +02:00
Trommel, Kees (Contractor)
660606091f Link failure with CONFIG_SPL and CONFIG_I2C_MUX_PCA954x
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.

Signed-off-by: Kees Trommel <kees.trommel.contractor@draeger.com>
Cc:  Heiko Schocher <hs@denx.de>
2020-08-25 06:25:42 +02:00
Stefan Roese
af03bde0fa i2c: octeon_i2c: Misc fixes for ARM Octeon TX2 support
This patch fixes a few issues noticed, when testing this new driver on
ARM Octeon TX2 again. Here the details:

- Remove "common.h" header inclusion
- Use correct THP define on Octeon TX2
- Octeon TX2 uses the same compatible as Octeon TX. We can't distinguish
  both platforms this way. Remove the unused "cavium,thunder2-99xx-twsi"
  compatible and add a check to the Octeon TX2 specific
  "cavium,thunderx-i2c" so that the correct driver data is selected.
- Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE()
  as its not needed for the PCI based probing on Octeon TX2

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-08-25 06:21:23 +02:00
Suneel Garapati
bc30140d20 pci: pci-uclass: Make DT subnode parse optional
Parse subnode DT properties only if parent node is valid.
Otherwise, assert is triggered on ofnode_valid in ofnode_first_subnode
from dev_for_each_subnode.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Suneel Garapati
b3699a13a6 pci: pci-uclass: Fix incorrect argument in map_physmem
Fix argument ordering for map_physmem() called in dm_pci_map_ea_bar().
Additinally minor spelling correction.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
e002474158 pci: pci-uclass: Dynamically allocate the PCI regions
Instead of using a fixed length pre-allocated array of regions, this
patch moves to dynamically allocating the regions based on the number
of available regions plus the necessary regions for DRAM banks.

Since MAX_PCI_REGIONS is not needed any more, its removed completely
with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
3b7cd265b8 pci: pci-uclass: Remove #ifdef CONFIG_NR_DRAM_BANKS as its always set
Since the migration to Kconfig, CONFIG_NR_DRAM_BANKS is configured for
all boards. Hence we can remove the conditional compilation and the code
path that will never get compiled.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
2020-08-25 05:41:09 +02:00
Stefan Roese
68f81b8575 dm: core: Add API to read PCI bus-range property
Add dev_read_pci_bus_range() to read bus-range property values

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-25 05:41:09 +02:00
Bin Meng
3ab2601052 ram: sifive: Fix compiler warnings for 32-bit
priv->info.size is of type 'size_t' but the length modifier is l.
Fix this by casting priv->info.size. Note 'z' cannot be used as
the modifier as SPL does not support that.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
2020-08-25 09:33:16 +08:00
Anastasiia Lukianenko
3337b29144 xen: Code style conformity
Cleaning up the following:

ERROR: do not use assignment in if condition
#281: FILE: drivers/xen/pvblock.c:260:
+       if ((err = xenbus_switch_state(XBT_NIL, nodename,
CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "err"
#52: FILE: drivers/xen/pvblock.c:298:
+       if (err != NULL) {
ERROR: do not use assignment in if condition
#176: FILE: drivers/xen/gnttab.c:103:
+               if ((flags = nflags) & (GTF_reading | GTF_writing)) {
WARNING: Missing or malformed SPDX-License-Identifier tag in line 1
#329: FILE: include/xen/gnttab.h:1:
+/*
WARNING: Misplaced SPDX-License-Identifier tag - use line 1 instead
#330: FILE: include/xen/gnttab.h:2:
+ * SPDX-License-Identifier: GPL-2.0
ERROR: do not use assignment in if condition
#630: FILE: lib/sscanf.c:558:
+                               if ((n = inr) < width) {

Signed-off-by: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
9f25aa13ea clk: mt7622: add needed clocks for ssusb-node
MT7622 needs additional clock definitions to work properly

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
a7e0ef15dd ahci: mediatek: fix copyright and author-lines
after review of sam copyright should be on one line and link should
not between author lines

just remove the link and put ryder first as he is author of linux-driver

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
a300d696ca reset: drop unnecessary comment for pciesys
after review from sam this comment should be removed

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2020-08-24 14:11:31 -04:00
Frank Wunderlich
626892a779 phy: mtk-tphy: make shared reg optional for v1
make the shared reg optional when version is v1 for sata

Suggested-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-08-24 14:11:31 -04:00
AKASHI Takahiro
6b0ddd1fbc virtio_blk: set log2blksz correctly
'log2blksz' in blk_desc structure must always be initialized, otherwise
it will cause a lot of weird failures in file operations.

For example, fs_set_blk_dev[_with_part]() examines a block device against
every file system with its probe function. In particular, ext4 file
system's ext4_probe() will calls fs_devread() to fetch a super block.
If log2blksz is 0, the actual 'read' size, i.e. block_len >> log2blksz, is
much bigger than a buffer's size, and it can end up with memory corruption.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: f4802209e5 ("virtio: Add block driver support")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-24 14:11:31 -04:00
Michal Simek
10e4d64e34 firmware: psci: Do not bind driver if U-Boot runs in EL3
There is no reason to bind psci driver if U-Boot runs in EL3 because
SMC/HVC instructions can't be called. That's why detect this state and
don't let user to crash from prompt by performing reset or poweroff
commands (if enabled).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-24 14:11:31 -04:00
Tom Rini
1aa3966173 Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Add CCF clocks definitions for iMX6Q enet (ETH)
- Several fixes for CCF framework - the most notable is the one, which
  adds get_rate helper to clk-mux.c
- Improvements for clk command - better visibility and alignment.
2020-08-24 09:06:02 -04:00
Lukasz Majewski
ebd3f1f0d0 clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.c
After adding custom get_rate helper function it was necessary to include
<dm/uclass.h> to avoid warnings about missing uclass_get_device_by_name.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Series-to: u-boot
2020-08-24 11:36:34 +02:00
Dario Binacchi
12d152620d clk: ccf: mux: change the get_rate helper
The previous version of the get_rate helper does not work if the mux
clock parent is changed after the probe. This error has not been
detected because this condition has not been tested. The error occurs
because the set_parent helper does not change the parent of the clock
device but only the clock selection register. Since changing the parent
of a probed device can be tricky, the new version of the get_rate helper
provides the rate of the selected clock and not that of the parent.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
e3b5d74c77 clk: ccf: mux: fix access to the sandbox register
The tests developed for the mux clock are run on the sandbox. They don't
call the clk_mux_set_parent routine and therefore they do not detect
this error.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
40559d2774 clk: ccf: mux: fix typo
Close the opening bracket.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
76eaa2d0ed clk: ccf: mux: change include order
Apply u-boot coding style on include files order.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
7b0830d41f clk: fix the console output of clk_register
The parent->name variable can be used only in case the
uclass_get_device_by_name routine returns successfully.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
16bdc85b48 clk: set flags in the ccf registration routines
The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-08-24 11:03:26 +02:00
Dario Binacchi
cd16c57bd0 dm: test: clk: add the test for the ccf gated clock
Unlike the other clock types, in the case of the gated clock, a new
driver has been developed which does not use the registering routine
provided by the common clock framework.
The addition of the ecspi0 clock to sandbox therefore allows testing
the ccf gate clock.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
32f462ba3b clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF need
to provide PTP clock.

On the i.MX6Q this clock is provided with IMX6QDL_CLK_ENET_REF in the Linux
kernel's CCF.

Code in this change models the simplest case when enet reference clock is
generated from 'osc' clock.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
8d540ccb11 clk: imx: Add support for pllv3 enet clock
This code has been ported from Linux kernel v5.5.5 (tag) and has been
adjusted to U-Boot's DM.

It adds support for correct recognition of IMX_PLLV3_ENET flag in the
clk-pllv3.c driver.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Lukasz Majewski
d71fac8479 clk: imx6: Add definition for IMX6QDL_CLK_ENET clock
After commit 673f659732 ("net: fec_mxc: support i.MX8M with CLK_CCF") all
NXP boards, which are not IMX8 and in the same time are supporting CCF
need to provide IMX6QDL_CLK_ENET.

This change defines the missing clock in i.MX6Q's CCF.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Heinrich Schuchardt
6befc1f900 clk: ICS8N3QV01 remove superfluous code
Do not calculate a unused value of n which is overwritten in both branches
of the subsequent if statement.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-08-24 11:03:26 +02:00
Tom Rini
d584648dad replace devfdt_get_addr_ptr() with dev_read_addr_ptr()
binman fixes for portage
 various minor fixes
 'bind' command improvements
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Merge tag 'dm-pull-22aug20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

replace devfdt_get_addr_ptr() with dev_read_addr_ptr()
binman fixes for portage
various minor fixes
'bind' command improvements
2020-08-23 16:06:38 -04:00
Simon Glass
35bd70c510 Convert CONFIG_SPLASH_SCREEN et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SPLASH_SCREEN
   CONFIG_SPLASH_SCREEN_ALIGN
   CONFIG_SPLASHIMAGE_GUARD
   CONFIG_SPLASH_SOURCE

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-08-23 13:43:10 -04:00
Masahiro Yamada
702e57e113 treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.

To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.

To generate this commit, I ran the following semantic patch
excluding include/dm/.

  <smpl>
  @@
  type T;
  expression dev;
  @@
  -(T *)devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  @@
  expression dev;
  @@
  -devfdt_get_addr_ptr(dev)
  +dev_read_addr_ptr(dev)
  </smpl>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:53:37 -06:00
Masahiro Yamada
1450bff3e4 ata: mvebu: use dev_read_addr() to get base address
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-08-22 08:51:44 -06:00
Masahiro Yamada
0cbf3e08fc gpio: at91: use dev_read_addr() to get base address
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to uint32 because you could use devfdt_get_addr() without casting.

Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 08:51:44 -06:00
Ovidiu Panait
3fe69d3764 dm: core: Fix devfdt_get_addr_ptr return value
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.

Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking (void *)FDT_ADDR_T_NONE to check for NULL.

Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:59:14 -06:00
Patrice Chotard
cfa3ed4390 sandbox: phy: add driver_data for bind test cmd
Add driver data to existing compatible string "sandbox,phy".
Add an additional compatible string without driver_data

This will verify that bind command parses, finds and passes the
correct driver data to device_bind_with_driver_data() by using
driver_data in the second sandbox_phy_ids table entry.
In sandbox_phy_bind() a check is added to validate driver_data
content.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-08-22 07:58:39 -06:00