Commit Graph

39474 Commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu
6b24501438 fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:21 +02:00
Michal Simek
5242772c51 ARM64: zynqmp: Fix USB ulpi phy sequence
It should be enough to call low(5us)->high pulse for all cases
to provide proper reset. There is no need to call high->low->high.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:21 +02:00
Michal Simek
48255f5276 ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:21 +02:00
Michal Simek
d58fc12eb7 ARM64: zynqmp: Add support for DFU from SPL
SPL needs to have bigger stack size because of USB.
Simple malloc needs to be disabled because dfu code requires different
allocation functions. There is no space in OCM that's why random place
in DDR is used.

BOOTD must be disabled because it is causing compilation error.

All variables are disabled and used only variables valid for DFU because
they are simple huge. Including automatic variables added by
CONFIG_ENV_VARS_UBOOT_CONFIG.
Hardcode addresses for u-boot, atf, kernel and dtb
just for SPL DFU code.

Enable SPL DFU for zcu100.
Create new usb_dfu_spl variable just to run Linux kernel loaded in SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:21 +02:00
Michal Simek
e1024c9808 ARM: Add new BOOT_DEVICE_DFU boot mode
This enum is needed when SPL_DFU is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
3373a52283 ARM64: zynqmp: Add USB boot mode
Add USB boot mode.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
8ed31f369a ARM64: zynqmp: Move BSS location to the beginning of ram
With SPL_DFU support memory layout needs to be cleanup
that's why move bss to the start of memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
5f647c2284 spi: zynq: Use variable to remove u32 to u64 conversions
Current code generates warning when it is compiled for arm64:
Warnings:
In file included from drivers/spi/zynq_spi.c:14:0:
drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’:
drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated
to unsigned type [-Woverflow]
  writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr);
         ^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
                                  ^
drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’:
drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly
truncated to unsigned type [-Woverflow]
  writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, &regs->enr);
         ^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
                                  ^
This patch is using one variable to do conversion via u32 variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-09-22 07:33:20 +02:00
Michal Simek
9feff385f8 ARM64: zynqmp: Fix usb_gadget_handle_interrupt routine
Function is defined in g_dnl.h and have different parameter
then it is used. This patch fixes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
7f491d7b30 ARM64: zynqmp: Force certain bootmode for SPL
ZynqMP provides an option to overwrite bootmode setting which
can change SPL behavior.
For example: boot SPL via JTAG and then SPL loads images from SD.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
275bd6d11f ARM64: zynqmp: Wire up both USBs available on ZynqMP
The second USB wasn't enabled. This patch fixes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:20 +02:00
Michal Simek
6ded73aa97 fpga: Add Kconfig to fpga subsystem
Add missing Kconfig to fpga subsystem to be able
to add new options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-09-22 07:33:14 +02:00
Tom Rini
a2ed3f452d Merge git://git.denx.de/u-boot-dm 2016-09-20 09:34:53 -04:00
Tom Rini
60c629b836 PowerPC: Update last users of CONFIG_ISO_STRING to Kconfig
There are a few boards that use CONFIG_ISO_STRING as part of a sanity
check during firmware update at run time.  Move this string to Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:26 -04:00
Tom Rini
adf32adb70 PowerPC: Update MIP405/MIP405T to use Kconfig better
Convert CONFIG_MIP405T from SYS_EXTRA_OPTIONS to a real config

There are two boards, MIP405 and MIP405T that have a few differences.
Start by checking for CONFIG_TARGET_MIP405.  Then introduce
CONFIG_TARGET_MIP405T and use that not CONFIG_MIP405T.  Next, convert
also convert the usage of CONFIG_ISO_STRING to be based on Kconfig.

Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:25 -04:00
Siva Durga Prasad Paladugu
a4d88920e5 Kconfig: Move config IDENT_STRING to Kconfig
Move the config IDENT_STRING to Kconfig and migrate all boards

[sivadur: Migrate zynq boards]
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
[trini: Update configs, add some default to sunxi Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:23 -04:00
Tom Rini
06066a7df9 configs: Re-sync
Signed-off-by: Tom Rini <trini@konsulko.com>
2016-09-20 09:30:07 -04:00
Masahiro Yamada
9b1b6d4225 Revert "Increase default of CONFIG_SYS_MALLOC_F_LEN for SPL_OF_CONTROL"
This reverts commit 90c08d9e08.

I took a closer look at this after the commit was applied, and found
CONFIG_SYS_MALLOC_F_LEN=0x2000 was too much.  8KB memory for SPL is
actually too big for some boards.  Perhaps 0x800 is enough, but the
situation varies board by board.

Let's postpone our decision until we come up with a better idea.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-09-19 15:20:09 -04:00
Tom Rini
00709f5697 A20-OLinuXino-Lime2: Enable USB gadget support
Based on A13-OLinuXino, enable DFU and UMS support.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2016-09-19 11:37:06 -04:00
Simon Glass
8f224b3734 dtoc: Add methods for reading data from properties
Provide easy helpers for reading integer, string and boolean values from
device-tree properties.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
20024daee5 dtoc: Correct quotes in fdt_util
The style is to use single quotes for strings where possible. Adjust this
function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
babdbde68f dtoc: Support finding the offset of a property
Add a way to find the byte offset of a property within the device tree. This
is only supported with the normal libfdt implementation since fdtget does
not provide this information.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
da5f74998b dtoc: Support packing the device tree
After any node/property deletion the device tree can be packed to remove
spare space. Add a way to perform this operation.

Note that for fdt_fallback, fdtput automatically packs the device tree after
deletion, so no action is required here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
2a70d897ed dtoc: Support deleting device tree properties
Add support for deleting a device tree property. With the fallback
implementation this uses fdtput. With libfdt it uses the API call and
updates the offsets afterwards.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
0170804f60 dtoc: Move to using bytearray
Since we want to be able to change the in-memory device tree using libfdt,
use a bytearray instead of a string. This makes interfacing from Python
easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
346179f0d3 dtoc: Prepare for supporting changing of device trees
For binman we need to support deleting properties in the device tree. This
will change the offsets of nodes after the deletion. In preparation, add
code to keep track of when the offsets are invalid, and regenerate them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
6b93c55f59 dtoc: Drop the convert_dash parameter to GetProps()
This is not used anywhere in dtoc, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
355c67c35a dtoc: Allow the device tree to be compiled from source
If a source device tree is provide to the Fdt() constructors, compile it
automatically. This will be used in tests, where we want to build a
particular test .dts file and check that it works correctly in binman.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
0faf6144fd patman: Add a library to handle logging and progress
When tools want to display information of varying levels of importance, it
helps to provide the user with control over the verbosity of these messages.
Progress messages work best if they are displayed and then removed from the
display when no-longer relevant.

Add a new tout library (terminal out) to handle these tasks.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:39 -06:00
Simon Glass
1f1864b408 patman: Add a tools library for using temporary files
For tools which want to use input files and temporary output, it is useful
to have the handling of these dealt with in one place. Add a new library
which allows input files to be read, and output files to be written, all
based on a common directory structure.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
f7a2aeeeb8 dtoc: Move a few more common functions into fdt.py
Some functions have the same code in the subclasses. Move these into the
superclass to avoid duplication.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
c322a850af dtoc: Move Widen() and GetPhandle() into the base class
These functions are identical in both subclasses. Move them into the base
class.

Note: In fact there is a bug in one version, which was fixed by this patch:

https://patchwork.ozlabs.org/patch/651697/

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
bc1dea3656 dtoc: Move BytesToValue() and GetEmpty() into PropBase
These functions are currently in a separate fdt_util file. Since they are
only used from PropBase and subclasses, it makes sense for them to be in the
PropBase class.

Move these functions into fdt.py along with the list of types.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
a06a34b203 dtoc: Create a base class for Fdt
At present we have two separate implementations of the Fdt library, one which
uses fdtget/fdtput and one which uses libfdt (via swig).

Before adding more functionality it makes sense to create a base class for
these. This will allow common functions to be shared, and make the Fdt API
a little clearer.

Create a new fdt.py file with the base class, and adjust fdt_normal.py and
fdt_fallback.py to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
66051b1f59 dtoc: Rename fdt.py to fdt_normal.py
In preparation for creating an Fdt base class, rename this file to indicate
it is the normal Fdt implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
ba48258566 dtoc: Move the fdt library selection into fdt_select
Rather than have dtc worry about which fdt library to use, move this into
a helper file. Add a function which creates a new Fdt object and scans it,
regardless of the implementation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
5859311545 dtoc: Move the struct import into the correct order
This should be in with the other system includes. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Simon Glass
785f1548a9 patman: Adjust command.Output() to raise an error by default
It is more useful to have this method raise an error when something goes
wrong. Make this the default and adjust the few callers that don't want to
use it this way.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Stefan Brüns
49afb37988 sandbox: Add "host size" hostfs command for fs test
This complements the size/fatsize/ext4size commands added in
commit cf6598193a
load, save and ls are already implemented for hostfs, now tests can
cover the same operations on hostfs and emulated block devices.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Stefan Brüns
2945eb73dd sandbox: document support of block device emulation
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Simon Glass <sjg@chromium.org>
Changed 'Sandbox' to 'sandbox' in subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
2016-09-18 21:04:38 -06:00
Tom Rini
9a6535e05f Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2016-09-18 14:05:30 -04:00
Tom Rini
b58d351244 Merge branch 'master' of git://www.denx.de/git/u-boot-sunxi 2016-09-18 14:05:29 -04:00
Tom Rini
a7a97fddb3 Merge branch 'master' of git://www.denx.de/git/u-boot-arc 2016-09-18 14:05:28 -04:00
Masahiro Yamada
f9d7e17e84 ARM: uniphier: update DRAM init code for LD20 SoC
Import the latest version from the Diag software.

  - Support LD21 SoC (including DDR chips in the package)
  - Per-board granule adjustment for both reference and TV boards
  - Misc cleanups

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
682e09ff9f ARM: uniphier: add PLL init code for LD20 SoC
Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper.  Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:12:26 +09:00
Masahiro Yamada
fcc238baee ARM: uniphier: collect clock/PLL init code into a single directory
Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper.  Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:06:47 +09:00
Masahiro Yamada
6a3e4274e4 ARM: uniphier: move PLL init code to U-Boot proper where possible
The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper.  Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-19 00:06:44 +09:00
Masahiro Yamada
22de6b3374 ARM: uniphier: rename CONFIG_DPLL_SSC_RATE_1PER
Basically, this should not be configured by users.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:27 +09:00
Masahiro Yamada
b78ffc53c5 ARM: uniphier: move XIRQ pin-mux settings of LD11/LD20
This is the last code in the mach-uniphier/pinctrl/ directory.
Push the remaining code out to delete the directory entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:27 +09:00
Masahiro Yamada
68557ec37e ARM: uniphier: consolidate System Bus pin-mux settings for LD11/LD20
Use the pin-mux data in the pinctrl drivers by directly calling
pinctrl_generic_set_state().

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-18 23:47:18 +09:00