Since we already have a bunch of Kconfig options for CMC/FSP/VGA file
names, add these from Kconfig in the corresponding dts nodes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the conversion to use binman to build x86 boards, Intel Galileo
board does not build anymore due to missing ucode entry. In fact
ucode is not needed for quark-based boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To use driver-model adds the pmic node for max8998.
This is used as kerel device-tree in Linux.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Fix the MMU mapping for A8K device family:
- Separate A7K and A8K memory mappings
- Fix memory regions by including IO mapping for all
3 PCIe interfaces existing on each connected CP110 controller
Add A8K memory mapping documentation with all regions
configured by Marvell ATF.
Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"<chip>-l2-cache-controller" and "cache" as values.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
H3 SID controller has some bug, which makes the initial SID value at
SUNXI_SID_BASE wrong when boot.
Change the SID retrieve code to call the SID Controller directly on H3,
which can get the correct value, and also fix the SID value at
SUNXI_SID_BASE, so that it can be used by further operations.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base address
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By adding labels to the cpu nodes in the dtsi, a dts that
includes it can change the OPPs by referencing the cpu0
through the label.
[Based on linux (400b6a0cbef55d1ae32808eaa1ef1c28820bf6ac)]
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change x86 boards to use binman to produce the ROM. This involves adding the
image definition to the device tree and using it in the Makefile. The
existing ifdtool features are no-longer needed.
Note that the u-boot.dtsi file is common and is used for all x86 boards which
use microcode. A separate emulation-u-boot-dtsi is used for the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Move sunxi boards to use binman. This involves adding the image definition
to the device tree and using it in the Makefile.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With the new device-tree rules it is possible to put device-tree changes
needed by U-Boot into their own file. As an example of this approach, move
Tegra over to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Shuffle the macros around a little to remove the following warning
when building for i.MX28:
arch/arm/cpu/arm926ejs/mxs/spl_boot.c:44:26: warning: ‘iomux_boot’ defined but not used [-Wunused-const-variable=]
static const iomux_cfg_t iomux_boot[] = {
^~~~~~~~~~
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Add i.MX6UL dtsi support from Linux.
Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Use CONFIG_DM_ETH and remove board_eth_init code
from board files.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.
Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.
The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
The LCDIF Pixel clock mux is not glitchless, so need
to gate before changing mux.
Also change enable_lcdif_clock prototype with a new input
parameter to indicate disable or enable.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
The mux for the lcd clock is not glitchless,
so need to first gate the clock before changing the mux.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
>From RM, per_periph2_clk_sel option3 is:
"derive clock from 198MHz clock (divided 392MHz PLL2 PFD)."
So fix it.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
