Commit Graph

7 Commits

Author SHA1 Message Date
Simon Glass
77bb1c69df acpi: tpm: Add a TPM1 table
This provides information about a v1 TPM in the system. Generate this
table if the TPM is present.

Add a required new bloblist type and correct the header order of one
header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:23 +08:00
Simon Glass
9179c3571c acpi: tpm: Add a TPM2 table
This provides information about a v2 TPM in the system. Generate this
table if the TPM is present.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:23 +08:00
Simon Glass
c9cc37de2c x86: apl: Support writing the IntelGraphicsMem table
This table is needed by the Linux graphics driver to handle graphics
correctly. Write it to ACPI.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:15 +08:00
Simon Glass
99e555a79a x86: coral: Add ACPI tables for coral
This device has a large set of ACPI tables. Bring these in from coreboot
so that full functionality is available (apart from SMI).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25 11:27:13 +08:00
Simon Glass
02247c1887 bloblist: Tidy up a few comments and code-style nits
Add a messing error code to bloblist_new() and tidy up the line length in
bloblist_addrec().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
5b044548f5 bloblist: Add a new function to add or check size
A common check is to see if a blob is present, create it if not and make
sure that the size is large enough. Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
9f407d4ef0 Add core support for a bloblist to convey data from SPL
At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.

Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.

Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
2018-11-26 08:25:32 -05:00