Commit Graph

38763 Commits

Author SHA1 Message Date
Simon Glass
2e3f1ff63f dm: Convert users from dm_scan_fdt_node() to dm_scan_fdt_dev()
This new function is more convenient for callers, and handles pre-relocation
situations automatically.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:15:07 -06:00
Simon Glass
cc7f66f70c dm: core: Add a function to bind child devices
We currently use dm_scan_fdt_node() to bind devices. It is an internal
function and it requires the caller to know whether we are pre- or post-
relocation.

This requirement has become quite common in drivers, so the current function
is not ideal.

Add a new function with fewer arguments, that does not require internal
headers. This can be used directly as a post_bind() method if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:14:37 -06:00
Jaehoon Chung
5628347f59 dm: mmc: dwmmc: use the callback functions as static
There are no places to call these functions.
It should be used the callback function.
Then it can be used as static functions.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:14:37 -06:00
Jaehoon Chung
dec0242be7 dm: mmc: dwmmc: fix the wrong explanation for clock values
This e,g is wrong. Maximum/minimum e.g values are swapped each other.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-07-27 14:14:37 -06:00
Tom Rini
0b6699ad8e Merge branch 'master' of http://git.denx.de/u-boot-sunxi 2016-07-26 18:33:04 -04:00
Hans de Goede
2eb1ff3b5b sunxi: Disable sun8i emac driver
Disable the sun8i emac driver for now, there are 2 issues with it:

1) It is causing issues with network connectivity under the kernel driver,
when booting the kernel with v2 of Corentin's sun8i-h3 emac driver, I get
the connection status bouncing between connected at 100mbps full-duplex
and being down every second.

The second issue is that when trying to use it from u-boot
I get a number of unaligned cache flush errors:

=> dhcp
BOOTP broadcast 1
BOOTP broadcast 2
CACHE: Misaligned operation at range [7bf594a8, 7bf59628]
BOOTP broadcast 3
CACHE: Misaligned operation at range [7bf59c90, 7bf59e10]
CACHE: Misaligned operation at range [7bf5a478, 7bf5a5f8]
DHCP client bound to address 10.42.43.80 (1009 ms)

Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Corentin LABBE <clabbe.montjoie@gmail.com>
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-27 00:05:25 +02:00
Masahiro Yamada
4fd92db8db ARM: uniphier: move CONFIG_I2C_EEPROM to defconfig
We already have the entry for this option in Kconfig, so let's
migrate to it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-26 17:35:46 -04:00
Tom Rini
499a950d41 Merge git://git.denx.de/u-boot-mpc86xx 2016-07-26 17:34:51 -04:00
Tom Rini
9c7a0a600b Merge git://git.denx.de/u-boot-fsl-qoriq 2016-07-26 17:34:28 -04:00
Chen-Yu Tsai
a85ba87dbe net: sun8i_emac: Drop redundant and incorrect setting of syscon register
In sun8i_emac_board_setup, the driver partially configures the syscon
register for H3 EPHY. However, the settings are incomplete, and
completely unusable. The correct settings are later set in
sun8i_emac_set_syscon, but the incorrect CLK_SEL setting persists.

It is incorrect to use CLK_SEL to select 25 MHz, as the SoC does not
have a 25 MHz clock the EPHY can use.

This patch removes the setting of the syscon register in board_setup,
and also moves set_syscon above mdio_init. While mdio_init does not
access the PHY, it is better to have the PHY parameters setup before
the MDIO bus is registered.

Fixes: a29710c525 ("net: Add EMAC driver for H3/A83T/A64 SoCs.")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:03 +02:00
Chen-Yu Tsai
687284483c net: sun8i_emac: Do not configure AHB2 clock
The sun8i_emac driver erroneously configures the AHB2 clock when it
assumes it is configuring the AXI gates, which is not even documented
or ever appeared in either the WiP kernel driver or Allwinner's original
driver.

As a result, AHB2 clock mux is set to an invalid setting, making the
EPHY unusable.

Fixes: a29710c525 ("net: Add EMAC driver for H3/A83T/A64 SoCs.")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:02 +02:00
Chen-Yu Tsai
6d7b22a5d8 sunxi: Add EMAC ethernet0 alias for H3 dtsi
The sunxi ethernet address generation code looks for ethernet[0-3]
aliases to find ethernet controllers to generate MAC addresses for.

Without a valid address, the driver fails to register.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:02 +02:00
Hans de Goede
2a5adc5b3c sunxi: Add defconfig and dts file for the Orange Pi PC Plus SBC
There is a new Orange Pi PC *Plus* version available now,
this is an extended version of the regular Orange Pi PC
with sdio wifi and an eMMC.

The upstream kernel devs have decided that they want a separate
dts for the PC Plus rather then sharing a single dts between the
regular PC and the PC Plus. So add a new orangepi_pc_plus_defconfig
to match.

The added dts file matches the one submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-26 21:56:02 +02:00
Qianyu Gong
8401c7103d armv8: ls1043aqds: add IFC fixup in case QSPI is enabled
QSPI and IFC are pin-multiplexed on LS1043AQDS board. If QSPI is
enabled, IFC would not be initialized correctly. So disable the IFC
node for Linux.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:50 -07:00
Wenbin Song
dbe18f16d8 armv8/ls1043a: Add MTD partition scheme
Add and share the the MTD partition scheme with kernel by default
bootargs. And add the "mtdparts" env.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:14 -07:00
Wenbin Song
716d6677cb ARMv8/ls1046a: Cleanup the environment variables
Cleanup the variables: "kernel_addr","ramdisk_addr",
"ramdisk_size","console".

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:07 -07:00
York Sun
ed7a3943d5 armv8: fsl-layerscape: mmu: Fix enabling MMU
MMU bit in SCTLR needs to be set explicitly after tables are
created. It isn't an issue for EL3 becuase this bit is already
set by early MMU setup. But for other exception levels this
bit was not set.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:06 -07:00
Hongbo Zhang
3288628a8d ARMv7: PSCI: ls102xa: move secure text section into OCRAM
LS1021 offers two secure OCRAM blocks for trustzone.
This patch moves all the secure text sections into the OCRAM.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:03:00 -07:00
Hongbo Zhang
aeb901f2a6 ARMv7: PSCI: ls102xa: add more PSCI v1.0 functions implemention
This patch implements PSCI functions for ls102xa SoC following PSCI v1.0,
they are as the list:
    psci_version,
    psci_features,
    psci_cpu_suspend,
    psci_affinity_info,
    psci_system_reset,
    psci_system_off.

Tested on LS1021aQDS, LS1021aTWR.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:49 -07:00
Hongbo Zhang
7e742c276d ARMv7: PSCI: ls102xa: check target CPU ID before further operations
The input parameter CPU ID needs to be validated before furher oprations such
as CPU_ON, this patch introduces the function to do this.

Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:44 -07:00
Hongbo Zhang
116339d460 ARMv7: PSCI: add PSCI v1.0 functions skeleton
This patch adds all the PSCI v1.0 functions in to the common framework, with
all the functions returning "not implemented" by default, as a common framework
all the dummy functions are added here, it is up to every platform developer to
decide which version of PSCI and which functions to implement.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Signed-off-by: Wang Dongsheng <dongsheng.wang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:39 -07:00
Mingkai Hu
9d3b8bd166 drivers: net/fm: Add Fman support for LS1046A
The Fman module on LS1046A is similiar with that on LS1043A but
LS1046A has one more XFI (10GbE) interface.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:32 -07:00
Mingkai Hu
b528b9377d armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:23 -07:00
Qianyu Gong
da4d620c90 armv8: fsl_lsch2: Add SerDes 2 support
New SoC LS1046A belongs to Freescale Chassis Generation 2 and
has two SerDes so we need to add this support in fsl_lsch2.
The SoC related SerDes 2 support will be added in SoC patch.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:16 -07:00
Qianyu Gong
86336e60c5 armv8: fsl-layerscape: Consolidate the LSCH2 common defines
Both LS1012A and LS1043A belong to FSL_LSCH2 and share some common
configurations. So put the common define under FSL_LSCH2 to increase
readability.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:09 -07:00
Alison Wang
79119a4d19 armv8: fsl-layerscape: Add A72 core detection
Add support to detect Cortex-A72 core for printing it out.
The Initiator Version of A72 core should be 0x4.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:02:00 -07:00
York Sun
dbb9d04fbd armv8: ls1043aqds: Update MAINTAINERS
Add ls1043aqds_lpuart_defconfig to file list.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:58 -07:00
York Sun
0c14c4d65b armv8: ls2080aqds: Update MAINTAINERS
Add ls2080aqds_qspi_defconfig to file list.

Signed-off-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:58 -07:00
Sumit Garg
e7e720c2ce arm: ls1021atwr: Add SD secure boot target
Add SD secure boot target for ls1021atwr.
Implement board specific spl_board_init() to setup CAAM stream ID and
corresponding stream ID in SMMU. Change the u-boot size defined by a
macro for copying the main U-Boot by SPL to also include the u-boot
Secure Boot header size as header is appended to u-boot image. So header
will also be copied from SD to DDR.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:49 -07:00
Sumit Garg
69d4b48c84 SECURE_BOOT: Enable SD as a source for bootscript
Add support for reading bootscript and bootscript header from SD. Also
renamed macros *_FLASH to *_DEVICE to represent SD alongwith NAND and
NOR flash.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:43 -07:00
Sumit Garg
028ac8c733 SECURE_BOOT: Enable chain of trust in SPL framework
Override jump_to_image_no_args function to include validation of
u-boot image using spl_validate_uboot before jumping to u-boot image.
Also define macros in SPL framework to enable crypto operations.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:35 -07:00
Sumit Garg
7f0a0e4c58 DM: crypto/fsl: Enable rsa DM driver usage before relocation
Enable rsa signature verification in SPL framework before relocation for
verification of main u-boot.

Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:21 -07:00
Rajesh Bhagat
9729dc9565 include: usb: Rename USB controller base address mapping
Remove Soc specific defines and use generic chasis specific defines
for USB controller base address mapping.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:01:04 -07:00
mario.six@gdsys.cc
27059c3e4d i2c: fsl: Fix driver initialization
Due to a oversight in testing, the initialization of the recently
introduced Freescale I2C DM driver works only for 36 bit mode of e.g.
the MPC85XX SoCs (specifically, if the physical addresses are 64 bit
wide and the DT addresses 32 bit wide).

This patch corrects the initialization so that it will work in a more
general setting.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-07-26 09:00:44 -07:00
Tom Rini
c3c9fd31ba Merge branch 'master' of git://git.denx.de/u-boot-i2c 2016-07-26 08:29:30 -04:00
mario.six@gdsys.cc
6e677caf8c i2c: mvtwsi: Add documentation
Add full documentation to all driver functions.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:20:38 +02:00
mario.six@gdsys.cc
c68c624320 i2c: mvtwsi: Make delay times frequency-dependent
Some devices using the MVTWSI driver have the option to run at speeds
faster than Standard Mode (100kHZ). On the Armada 38x controllers, this
is actually necessary, since due to erratum FE-8471889, a timing
violation concerning repeated starts prevents the controller from
working correctly in Standard Mode. One of the workarounds recommended
in the erratum is to set the bus to Fast Mode (400kHZ) operation and
ensure all connected devices are set to Fast Mode.

In the current version of the driver, however, the delay times are
hard-coded to 10ms, corresponding to Standard Mode operation. To take
full advantage of the faster modes, we would need to either keep the
currently configured I2C speed in a globally accessible variable, or
pass it to the necessary functions as a parameter. For DM, the first
option is not a problem, and we can simply keep the speed in the private
data of the driver. For the legacy interface, however, we would need to
introduce a static variable, which would cause problems with boots from
NOR flashes; see commit d6b7757 "i2c: mvtwsi: Eliminate
twsi_control_flags."

As to not clutter the interface with yet another parameter, we therefore
keep the default 10ms delays for the legacy functions.

In DM mode, we make the delay time dependant on the frequency to allow
taking full advantage of faster modes of operation (tested with up to
1MHZ frequency on Armada MV88F6820).

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:20:28 +02:00
mario.six@gdsys.cc
24f9c6bbc7 i2c: mvtwsi: Handle zero-length offsets properly
Zero-length offsets are not properly handled by the driver. When a read
operation with a zero-length offset is started, a START condition is
asserted, and since no offset bytes are transferred, a repeated START is
issued immediately after, which confuses the controller.

To fix this, we send the first START only if any address bytes need to
be sent, and keep track of the expected start status accordingly.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:20:19 +02:00
mario.six@gdsys.cc
14a6ff2c4f i2c: mvtwsi: Add compatibility to DM
This patch adds the necessary functions and Kconfig entry to make the
MVTWSI I2C driver compatible with the driver model.

A possible device tree entry might look like this:

i2c@11100 {
	compatible = "marvell,mv64xxx-i2c";
	reg = <0x11000 0x20>;
	clock-frequency = <100000>;
	u-boot,i2c-slave-addr = <0x0>;
};

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:20:13 +02:00
mario.six@gdsys.cc
f8a10ed1fd i2c: mvtwsi: Make address length variable
The length of the address parameter of the __twsi_i2c_read and
__twsi_i2c_write functions is fixed to four bytes.

As a final step in the preparation of the DM conversion, we make the
length of this parameter variable by turning it into an array of bytes,
and convert the 32 bit value that's passed to the legacy functions into
a four-byte-array on the fly.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:20:05 +02:00
mario.six@gdsys.cc
3c4db636ac i2c: mvtwsi: Factor out adap parameter
To be able to use the compatibility layer from the DM functions, we
factor the adap parameter out of all functions, and pass the actual
register base instead.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:56 +02:00
mario.six@gdsys.cc
61bc02b260 i2c: mvtwsi: Add compatibility functions
To prepare for the DM conversion, we add a layer of compatibility
functions to be used by both the legacy and the DM functions.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:49 +02:00
mario.six@gdsys.cc
e075828128 i2c: mvtwsi: Use 'uint' instead of 'unsigned int'
Since some additional parameters will be added in the course of this
patch series (especially with the addition of DM support), we replace
the longer "unsigned int" declarations with "uint" declarations to keep
the parameter lists more readable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:42 +02:00
mario.six@gdsys.cc
059fce9f61 i2c: mvtwsi: Get rid of status parameter
The twsi_stop function contains a parameter "status," which is used to
pass in the current exit status of the function calling twsi_stop, and
either return this status unchanged if it indicates an error, or return
twsi_stop's exit status if it does not indicate an error.

While not massively complicated, this adds another purpose to the
twsi_stop function, which should have the sole purpose of asserting a
STOP condition on the bus (and not manage the exit status of its
caller).

Therefore, we move the exit status management into the caller functions
by introducing a "stop_status" variable and returning either the status
before the twsi_stop call (kept in the "status" variable), or the status
from the twsi_stop call, depending on which indicates an error.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:35 +02:00
mario.six@gdsys.cc
670514f524 i2c: mvtwsi: Eliminate flags parameter
Due to breaking boots from NOR flashes, commit d6b7757 ("i2c: mvtwsi:
Eliminate twsi_control_flags") removed the static global
twsi_control_flags variable, which kept a set of default flags that were
always or'd to the control register when writing. It was replaced with a
flags parameter, which was passed around between the functions that
needed it.

Since the twsi_control_flags variable was used just for the purposes of
a) setting the MVTWSI_CONTROL_TWSIEN on every control register write,
   and
b) setting the MVTWSI_CONTROL_ACK from twsi_i2c_read if needed,
anyway, the added overhead of another variable being passed around is no
longer justified, and we are better off implementing this flag setting
logic locally in the functions that actually write to the control
register.

Therefore, this patch sets MVTWSI_CONTROL_TWSIEN on every control
register write, replaces the twsi_i2c_read's flags parameter with a
ack_flag parameter, which tells the function whether to acknowledge the
read or not, and removes every other instance of the flags variable.
This has the added benefit that now every notion of "global default
flags" is gone, and it's much easier to see which control flags are
actually set at which point in time.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:29 +02:00
mario.six@gdsys.cc
49c801bf35 i2c: mvtwsi: Improve and fix comments
This patch fixes only comments/documentation: Streamline capitalization
and improve grammar/punctuation.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:23 +02:00
mario.six@gdsys.cc
dfc3958cd3 i2c: mvtwsi: Streamline code and add documentation
Convert groups of logically connected preprocessor defines into proper
enums, one macro into an inline function, and add documentation
to/extend existing documentation of these items.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:16 +02:00
mario.six@gdsys.cc
9ec43b0c3f i2c: mvtwsi: Fix style violations
This patch fixes seven style violations: Six superfluous spaces after
casts, and one logical continuation violation.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2016-07-26 10:19:06 +02:00
Mugunthan V N
c9433a4814 defconfig: am57xx_hs_evm: enable i2c driver model
Enable i2c driver model for am57xx_hs_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2016-07-26 08:41:33 +02:00
Mugunthan V N
9aa5874a76 defconfig: am57xx_evm: enable i2c driver model
Enable i2c driver model for am57xx_evm as omap i2c
supports driver model.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-07-26 08:41:23 +02:00