Commit Graph

11714 Commits

Author SHA1 Message Date
Jean-Jacques Hiblot
24e261b39c board: ti: dra7xx-evm: turn on USB clocks in late init stage
For USB ports that use the Driver Model, turn on the clocks during the
late init stage.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-12-07 16:31:46 +01:00
Jean-Jacques Hiblot
0131162439 dm: usb: create a new UCLASS ID for USB gadget devices
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.

Also move the generic DM code for USB gadgets in a separate file for
clarity.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-12-07 16:31:45 +01:00
Tom Rini
57dbc15143 rockchip: rk3399: Add MAINTAINERS entry
Add an entry for the Ficus EE board to the existing rock960 MAINTAINERS
file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-06 10:24:12 -05:00
Manivannan Sadhasivam
1bad5e1492 rockchip: rk3399: Add common Rock960 family from Vamrs
Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
96Boards.

Below are some of the key differences between both Rock960 and Ficus
boards:

1. Different host enable GPIO for USB
2. Different power and reset GPIO for PCI-E
3. No Ethernet port on Rock960

The common board support will be utilized by both boards. The device
tree has been organized in such a way that only the properties which
differ between both boards are placed in the board specific dts and
the reset of the nodes are placed in common dtsi file.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
[Added instructions for SD card boot]
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2018-12-06 16:04:49 +01:00
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Rick Chen
48cbf62460 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register
ax25-ae350 use CONFIG_OF_BOARD via a2 and CONFIG_SYS_SDRAM_BASE
to boot from ram which allow the board to override the fdt
address originally.

But after this patch
riscv: save hart ID and device tree passed by prior boot stage
It provide prior_stage_fdt_address which offer a temporary
memory address to keep the dtb address passing from loader(gdb)
to u-boot with a1.

So passing via a2 and CONFIG_SYS_SDRAM_BASE is redundant and
can be removed. And it also somehow may corrupted BBL if it
was be arranged in CONFIG_SYS_SDRAM_BASE.

In board_fdt_blob_setup()
When boting from ram:
prior_stage_fdt_address will be use to reserved dtb temporarily.

When booting from ROM:
dtb will be pre-burned in CONFIG_SYS_FDT_BASE, if it is flash base.
Or CONFIG_SYS_FDT_BASE maybe a memory map space (NOT RAM or ROM)
which is provided by HW.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
2018-12-05 14:14:16 +08:00
Anup Patel
4c60113647 riscv: Add S-mode defconfigs for QEMU virt machine
This patch adds S-mode defconfigs for QEMU virt machine so
that we can run u-boot in S-mode on QEMU using M-mode runtime
firmware (BBL or equivalent).

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:14:04 +08:00
Anup Patel
ef8c3d3fce riscv: qemu: Use different SYS_TEXT_BASE for S-mode
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.

Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-12-05 14:13:59 +08:00
Marek Vasut
0451380505 ARM: dts: Turn ULCB into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796 ULCB variants into single U-Boot
build and let U-Boot choose between them based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
14ebe87b58 ARM: dts: Turn Salvator-X into Multi-DTB config
Bundle DTBs for R8A7795, R8A7796, R8A77965 Salvator-X variants
into the single U-Boot build and let U-Boot choose between them
based on the CPU model.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Marek Vasut
3ba61f0672 ARM: rmobile: Drop unused macros from Gen3 boards
Drop unused MSTP macros from Gen3 boards. These are no longer needed
as the boards are using clock framework to manipulate clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-12-04 09:21:07 +01:00
Jorge Ramirez-Ortiz
94981c9859 MAINTAINERS: board: qcom: db820c: update email.
Update email address

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-12-03 21:50:54 -05:00
Tom Rini
0a3d59e010 Xilinx changes for v2019.01
microblaze:
 - Use default functions for memory decoding
 - Showing model from DT
 
 zynq:
 - Fix spi flash DTs
 - Fix zynq_help_text with CONFIG_SYS_LONGHELP
 - Tune cse/mini configurations
 - Enabling cse/mini testing with current targets
 
 zynqmp:
 - Enable gzip SPL support
 - Fix chip detection logic
 - Tune mini configurations
 - DT fixes(spi-flash, models, clocks, etc)
 - Add support for OF_SEPARATE configurations
 - Enabling mini testing with current targets
 - Add mini mtest configuration
 - Some minor config setting
 
 nand:
 - arasan: Add subpage configuration
 
 net:
 - gem: Add 64bit DMA support
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Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support
2018-12-03 19:30:54 -05:00
Tom Rini
9981c60ef5 Patch queue for rpi - 2018-12-03
A few Raspberry Pi specific changes this time:
 
   - Allow 2nd MMC device
   - Support RPi 3 Model A+
   - Allow UUID to find filesystem
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Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem
2018-12-03 17:52:53 -05:00
Jonathan Gray
d61cf138bc rpi: add 3 Model A+
Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE
according to the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Jonathan Gray
cb3f94718d rpi: add URL of official revision code list
Replace various third party lists of Raspberry Pi revision codes in a
comment with the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-12-03 20:25:06 +01:00
Christophe Leroy
4c4ca6cdd5 board: MCR3000: use new DM watchdog
This patch switches MCR3000 board to the new DM watchdog.

The change in u-boot.lds is because MCR3000.o grows a bit
with this patch and doesn't fit anymore below env_offset on
some versions of GCC.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Christophe Leroy
f55db0afa2 board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2018-12-03 10:44:10 -05:00
Yegor Yefremov
43c2c6c364 arm: baltos: remove unused header
OnRISC Baltos series uses SoM with tps65910 PMIC, so remove
"power/tps65217.h" header inclusion.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Yegor Yefremov
67c145a836 arm: baltos: move the board to CONFIG_BLK
Use DM for both MMC and USB subsystems and use dedicated DTS
for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for
DDR power control via GPIO.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-12-03 10:44:10 -05:00
Alexey Brodkin
6ef705b157 arc: devboards: Implement checkboard()
This allows us to print nice board name on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:53 +03:00
Alexey Brodkin
fb9a46a2ab arc: emsdp: Refactor register and bit accesses
Instead of "base + offset" define all registers right away
and access them later via direct defines.

Generate bit masks with "BIT" macro.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:45 +03:00
Alexey Brodkin
4e86c7e3cd arc: emsdp: Read real CPU clock value from hardware
We do real CPU clock measurement with help of built-in
counters. Thus we may accommodate different real clock values
that appear in different FPA images instead of relying on
something hard-coded in the .dtb.

And while at it make make SDIO base address define
look similar to others with casting to "(void *)".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:35 +03:00
Alexey Brodkin
7f25b72a78 arc: Get rid of board-specific print_cpuinfo()
Since we now do advanced CPU identification in
generic ARC code there's no need to have per-board
hardcoded data.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-12-03 14:26:26 +03:00
Tom Rini
172e3c1190 Fix sound on sandbox
Convert TPM fully to DM
 Tidy up sandbox I2C emulation
 Add a 'make qcheck' target for faster testing
 A few other misc things
 (dropped the final patch which breaks clang for some reason)
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Merge tag 'pull-30nov18' of git://git.denx.de/u-boot-dm

Fix sound on sandbox
Convert TPM fully to DM
Tidy up sandbox I2C emulation
Add a 'make qcheck' target for faster testing
A few other misc things
(dropped the final patch which breaks clang for some reason)
2018-11-30 17:09:50 -05:00
Stefan Roese
7b3af03ffd mips: mt76xx: gardena-smart-gateway: Add factory data variable handling
Some factory data is stored in the SPI NOR and needs to get extracted
from there into U-Boot environment variables.

This patch also includes a board-specific command "fd_write" to
provide some dummy / default values for this factory-data in the SPI
NOR flash. This should only be necessary for testing purposes though.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-30 17:21:44 +01:00
Michal Simek
ebcc1a223e arm64: zynqmp: Wire mini-emmc1 configuration with zcu102
For testing purpose use zcu102 which has SD at controller 1 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100)

Model: ZynqMP MINI EMMC1
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff170000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
f5ed777d29 arm64: zynqmp: Wire mini-emmc0 configuration with zcu100
For testing purpose use zcu100 which has SD at controller 0 and this can
be used for testing this mini configuration.

U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100)

Model: ZynqMP MINI EMMC0
Board: Xilinx ZynqMP
DRAM:  512 MiB
EL Level:       EL3
MMC:   sdhci@ff160000: 0
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
e615f39e7f arm64: zynqmp: Start usb ethernet gadget automatically
If only usb ethernet gadget is enabled it can start automatically.
If more gagdets are enabled usb ethernet gadget can be bind by
"bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Michal Simek
ee97a9996a arm64: zynqmp: Add mini mtest configuration
This configuration is useful when you want to run small u-boot and
perform DDR memory test to make sure that DDR is properly configured.
It is use for board bringup because alternative u-boot memory tests is
quite good.
Configuration is running out of OCM.

As is done for others mini configurations 0x80 bytes for variables is
enough and only default variables are stored there.

Alternative memtest is enabled and also 2GB of DDR via DTS files.
Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init()
from zcu102 for testing purpose.
In case of size issue this can be moved to SPL configuration as is done
for mini_qspi configuration but it is not a problem now.

Log:
U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100)

Model: ZynqMP MINI
Board: Xilinx ZynqMP
DRAM:  WARNING: Initializing TCM overwrites TCM content
2 GiB
EL Level:       EL3
In:    dcc
Out:   dcc
Err:   dcc
ZynqMP>

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-30 10:45:26 +01:00
Tom Rini
93e72ac472 Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
 - net: designware: add meson meson compatibles
 - Amlogic Meson cleanup for AXG SoC support
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Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic

Cleanup and update towards support for Amlogic Meson AXG SoCs :
- mmc: meson-gx: Add AXG compatible
- net: designware: add meson meson compatibles
- Amlogic Meson cleanup for AXG SoC support
2018-11-29 15:16:58 -05:00
Simon Glass
abdc7b8a2d tpm: Convert to use a device parameter
At present many TPM calls assume there is only one TPM in the system and
look up this TPM themselves. This is inconsistent with driver model, which
expects all driver methods to have a device parameter. Update the code to
correct this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-29 09:30:06 -07:00
Michal Simek
a837cfe5b2 arm64: zynqmp: Enable SPL for mini qspi configuration
Wire up mini_qspi SPL with zcu102 for testing purpose.
Normally mini u-boot runs with FSBL/SPL for certain board.
Enabling SPL and configuration from zcu102 helps with testing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 15:13:57 +01:00
Michal Simek
fdba86972f ARM: zynq: Wire SPL configuration for cse nor/nand targets
These symlinks are here only for testing purpose where SPL is used
for soc configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-29 10:31:02 +01:00
Weijie Gao
361e13f1d5 arm: MediaTek: add basic support for MT7623 boards
This adds a general board file based on MT7623 SoCs from MediaTek.

As this u-boot is loaded by MTK proprietary preloader, there is no
low level initializtion codes.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28 23:04:50 -05:00
Ryder Lee
cbd2fba1ec arm: MediaTek: add basic support for MT7629 boards
This adds a general board file based on MT7629 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-28 23:04:50 -05:00
Jagan Teki
35f9d9bdd0 spi: Zap CONFIG_HARD_SPI
In legacy CONFIG_HARD_SPI initalizing spi_init code, which
was removed during dm conversion cleanup.

So remove the dead instances of CONFIG_HARD_SPI, and related
code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-11-27 21:06:53 +05:30
Marcin Niestroj
70c44f1718 ARM: chiliboard: remove dead !CONFIG_DM_SERIAL code
DM_SERIAL is selected by TARGET_CHILIBOARD, so there is no reason to
keep code that will not be built. Remove it.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-26 22:52:14 -05:00
Marcin Niestroj
f1bca34ebf ARM: chiliboard: move towards driver model and device-tree boot
This patch mostly enables DM drivers in board defconfig and all their
dependencies. Additionally we remove ethernet platform data, as all
details are in device-tree now.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-11-26 22:52:14 -05:00
Tom Rini
ef0b75d3d8 Merge git://git.denx.de/u-boot-riscv 2018-11-26 15:52:39 -05:00
Jerome Brunet
b890acc743 ARM: meson: factorize common code out amlogic's boards
Now we have moved all the Amlogic board support to common generic board code,
we can move the identical board_init() and ft_board_setup() functions to
weak functions into the board-common mach-meson file.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00
Neil Armstrong
b72794e37e board: amlogic: add support for S400 board
The S400 board is the Amlogic AXG SoC reference board including :
 - Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
 - 1GB DDR4 SDRAM
 - 10/100 Ethernet
 - 2 x USB 2.0 Host
 - eMMC
 - Infrared receiver
 - SDIO WiFi Module
 - MIPI DSI Connector
 - Audio HAT Connector
 - PCI-E M.2 Connectors

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00
Jerome Brunet
33e3378091 ARM: meson: rework soc arch file to prepare for new SoC
We are about to add support for the Amlogic AXG SoC. While very close to
the Gx SoC family, we will need to handle a few thing which are different
in this SoC. Rework the meson arch directory to prepare for this.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00
Jerome Brunet
96a739b460 ARM: rework amlogic configuration
Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving
the board Kconfig into the mach-meson Kconfig to make it easier to add
new boards for a SoC architecture and add a custom config header or custom
board handler for a platform.

This drops the board CONFIGs and the duplicate boards configs headers in
favor of a single meson64.h config header.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:52 +01:00
Jerome Brunet
d54e03b612 board: amlogic: factorise gxbb boards
The nanopi-k2 and the odroid-c2 are similar enough to be supported
by the same u-boot board. This change use odroid-c2 u-boot board
for the nanopi-k2 as well. Dedicated defconfig are kept to customize
the names and device tree.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:51 +01:00
Neil Armstrong
302987b6c5 board: amlogic: move khadas-vim2 as q200 ref board
The Khadas vim2 derive from amlogic s912 reference design (Q200).

This patch moves the khadas-vim2 board support to a generic Q200 board,
while keeping a dedicated defconfig to customize the names and device tree.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:51 +01:00
Jerome Brunet
8bbfb40e57 board: amlogic: remove p212 derivatives
The Khadas vim and the libretech aml-s905x-cc (aka Potato) derive
from amlogic s905x reference design (P212).

All the code in these board is a copy/paste from the p212, which is
tedious to maintain. This change use p212 u-boot board for all these
boards, while keeping a dedicated defconfig to customize the names
and device tree.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-11-26 14:40:51 +01:00
Simon Glass
9946d557be sandbox: Add a memory map to the sandbox README
We have a few things in the memory map now, so add documentation for this
to avoid confusion. Also note that it is possible to run all tests now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-26 08:25:35 -05:00
Michal Simek
656185a5d7 microblaze: Use standard functions for memory decoding
The standard function is less error prone than custom one.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:55 +01:00
Michal Simek
0dc69f4193 ARM: zynq: Guard zynq_help_text with CONFIG_SYS_LONGHELP
If SYS_LONGHELP is disabled the following warning is generated:
board/xilinx/zynq/cmds.c:496:13: warning: ‘zynq_help_text’ defined but
not used [-Wunused-variable]

Normal way for fixing this is to guard the whole variable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-26 10:50:54 +01:00