mirror of
https://github.com/brain-hackers/u-boot-brain
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arm: baltos: move the board to CONFIG_BLK
Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration. Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO. Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Yegor Yefremov
Tom Rini
parent
8f5bfb7615
commit
67c145a836
439
arch/arm/dts/am335x-baltos.dts
Normal file
439
arch/arm/dts/am335x-baltos.dts
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@ -0,0 +1,439 @@
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/*
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* VScom OnRISC
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* http://www.vscom.de
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include <dt-bindings/pwm/pwm.h>
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/ {
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model = "OnRISC Baltos";
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compatible = "vscom,onrisc", "ti,am33xx";
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chosen {
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stdout-path = &uart0;
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};
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cpus {
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cpu@0 {
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cpu0-supply = <&vdd1_reg>;
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};
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};
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vbat: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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};
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&am33xx_pinmux {
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */
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0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */
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0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */
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0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */
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0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */
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0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
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0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
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>;
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};
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tps65910_pins: pinmux_tps65910_pins {
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pinctrl-single,pins = <
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0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */
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>;
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};
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tca6416_pins: pinmux_tca6416_pins {
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pinctrl-single,pins = <
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AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */
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0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
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/* Slave 2 */
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0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
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0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
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0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
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0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
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0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
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0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
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0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
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0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
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0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
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0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
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0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
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0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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/* Slave 2 reset value*/
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0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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nandflash_pins_s0: nandflash_pins_s0 {
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pinctrl-single,pins = <
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0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
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0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
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0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
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0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
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0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
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0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
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0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
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0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
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0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
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0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
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0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
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0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
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0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
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0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
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0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
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>;
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};
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};
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&elm {
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status = "okay";
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};
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&gpmc {
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins_s0>;
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
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status = "okay";
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8";
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ti,nand-xfer-type = "polled";
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gpmc,device-nand = "true";
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-on-ns = <0>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <0>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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boot@0 {
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label = "SPL";
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reg = <0x0 0x20000>;
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};
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boot@20000{
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label = "SPL.backup1";
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reg = <0x20000 0x20000>;
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};
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boot@40000 {
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label = "SPL.backup2";
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reg = <0x40000 0x20000>;
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};
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boot@60000 {
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label = "SPL.backup3";
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reg = <0x60000 0x20000>;
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};
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boot@80000 {
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label = "u-boot";
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reg = <0x80000 0x1e0000>;
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};
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boot@260000 {
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label = "UBI";
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reg = <0x260000 0xfda0000>;
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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status = "okay";
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clock-frequency = <1000>;
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tps: tps@2d {
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reg = <0x2d>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <28 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&tps65910_pins>;
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};
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at24@50 {
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compatible = "at24,24c02";
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pagesize = <8>;
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reg = <0x50>;
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};
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tca6416: gpio@20 {
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compatible = "ti,tca6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio0>;
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interrupts = <20 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&tca6416_pins>;
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};
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};
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&usb {
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status = "okay";
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};
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&usb_ctrl_mod {
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb1_phy {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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&usb1 {
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status = "okay";
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dr_mode = "host";
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};
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&cppi41dma {
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status = "okay";
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};
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/include/ "tps65910.dtsi"
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&tps {
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vcc1-supply = <&vbat>;
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vcc2-supply = <&vbat>;
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vcc3-supply = <&vbat>;
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vcc4-supply = <&vbat>;
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vcc5-supply = <&vbat>;
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vcc6-supply = <&vbat>;
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vcc7-supply = <&vbat>;
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vccio-supply = <&vbat>;
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ti,en-ck32k-xtal = <1>;
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regulators {
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vrtc_reg: regulator@0 {
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regulator-always-on;
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};
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vio_reg: regulator@1 {
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regulator-always-on;
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};
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vdd1_reg: regulator@2 {
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/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
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regulator-name = "vdd_mpu";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1312500>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd2_reg: regulator@3 {
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/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
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regulator-name = "vdd_core";
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regulator-min-microvolt = <912500>;
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regulator-max-microvolt = <1150000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vdd3_reg: regulator@4 {
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regulator-always-on;
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};
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vdig1_reg: regulator@5 {
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regulator-always-on;
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};
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vdig2_reg: regulator@6 {
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regulator-always-on;
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};
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vpll_reg: regulator@7 {
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regulator-always-on;
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};
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vdac_reg: regulator@8 {
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regulator-always-on;
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};
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vaux1_reg: regulator@9 {
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regulator-always-on;
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};
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vaux2_reg: regulator@10 {
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regulator-always-on;
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};
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vaux33_reg: regulator@11 {
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regulator-always-on;
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};
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vmmc_reg: regulator@12 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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dual_emac = <1>;
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status = "okay";
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <7>;
|
||||
phy-mode = "rgmii-txid";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext = <1>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
|
@ -35,8 +35,7 @@
|
|||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* GPIO that controls power to DDR on EVM-SK */
|
||||
#define GPIO_DDR_VTT_EN 7
|
||||
/* GPIO that controls DIP switch and mPCIe slot */
|
||||
#define DIP_S1 44
|
||||
#define MPCIE_SW 100
|
||||
|
||||
|
|
@ -248,9 +247,6 @@ const struct ctrl_ioregs ioregs_baltos = {
|
|||
|
||||
void sdram_init(void)
|
||||
{
|
||||
gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
|
||||
gpio_direction_output(GPIO_DDR_VTT_EN, 1);
|
||||
|
||||
config_ddr(400, &ioregs_baltos,
|
||||
&ddr3_baltos_data,
|
||||
&ddr3_baltos_cmd_ctrl_data,
|
||||
|
|
|
|||
|
|
@ -34,7 +34,6 @@ static struct module_pin_mux mmc0_pin_mux[] = {
|
|||
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
|
||||
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
|
||||
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
|
||||
//{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
|
||||
{-1},
|
||||
};
|
||||
|
||||
|
|
@ -46,11 +45,6 @@ static struct module_pin_mux i2c1_pin_mux[] = {
|
|||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux gpio0_7_pin_mux[] = {
|
||||
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */
|
||||
{-1},
|
||||
};
|
||||
|
||||
static struct module_pin_mux rmii1_pin_mux[] = {
|
||||
{OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */
|
||||
{OFFSET(mii1_txen), MODE(1)}, /* RGMII1_TCTL */
|
||||
|
|
@ -114,7 +108,6 @@ void enable_i2c1_pin_mux(void)
|
|||
void enable_board_pin_mux()
|
||||
{
|
||||
configure_module_pin_mux(i2c1_pin_mux);
|
||||
configure_module_pin_mux(gpio0_7_pin_mux);
|
||||
configure_module_pin_mux(rgmii2_pin_mux);
|
||||
configure_module_pin_mux(rmii1_pin_mux);
|
||||
configure_module_pin_mux(mmc0_pin_mux);
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_OMAP2PLUS=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_AM33XX=y
|
||||
|
|
@ -39,17 +38,22 @@ CONFIG_CMD_MTDPARTS=y
|
|||
CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
|
||||
CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),128k(SPL.backup1),128k(SPL.backup2),128k(SPL.backup3),1920k(u-boot),-(UBI)"
|
||||
CONFIG_CMD_UBI=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos"
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_SYS_OMAP24_I2C_SPEED=1000
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MMC_OMAP_HS_ADMA=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_PHY_ADDR_ENABLE=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_OMAP3_SPI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
CONFIG_USB_MUSB_DSPS=y
|
||||
|
|
@ -59,7 +63,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
|||
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_USB_FUNCTION_MASS_STORAGE=y
|
||||
CONFIG_USB_ETHER=y
|
||||
CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
|
||||
CONFIG_FAT_WRITE=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user