Commit Graph

66281 Commits

Author SHA1 Message Date
Rasmus Villemoes 09381829a2 rtc: add dm_rtc_write() helper
Similar to dm_rtc_read(), introduce a helper that allows the caller to
write multiple consecutive 8-bit registers with one call. If the
driver provides the ->write method, use that, otherwise loop using
->write8.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:44 +02:00
Rasmus Villemoes d8be08805b rtc: add dm_rtc_read helper and ->read method
Some users may want to read multiple consecutive 8-bit
registers. Instead of each caller having to implement the loop,
provide a dm_rtc_read() helper. Also, allow a driver to provide a
->read method, which can be more efficient than reading one register
at a time.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-07-09 06:02:44 +02:00
Ye Li 35d3982e23 i2c: imx_lpi2c: Improve the codes to use private data
Current driver calls the devfdt_get_addr to get the base address
of lpi2c controller in each sub-functions. Since the devfdt_get_addr
accesses the DTB and translate the address, it introduces much
overhead.
Improve the codes to use private variable which has recorded the
base address from probe.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-09 06:02:44 +02:00
Alex Nemirovsky 44ad59e695 board: presidio-asic: Add I2C support
Add I2C board support for Cortina Access Presidio Engineering Board

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-09 06:02:44 +02:00
Arthur Li 7f5ea25062 i2c: i2c-cortina: added CAxxxx I2C support
Add I2C controller support for Cortina Access CAxxxx SoCs

Signed-off-by: Arthur Li <arthur.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
CC: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>

hs: fixed build error, add include log.h
2020-07-09 06:02:44 +02:00
Suneel Garapati 5c2c3e8b44 i2c: octeon_i2c: Add I2C controller driver for Octeon
Add support for I2C controllers found on Octeon II/III and Octeon TX
TX2 SoC platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-07-09 06:02:44 +02:00
Tom Rini 61608f395e Merge branch '2020-07-08-misc-features-and-fixes'
- mem cmd improvements
- TPM fixes
- SPL/NAND/FIT fixes
- RSA improvements
2020-07-08 20:20:24 -04:00
Heiko Stuebner c89b41b4db lib: rsa: function to verify a signature against a hash
rsa_verify() expects a memory region and wants to do the hashing itself,
but there may be cases where the hashing is done via other means,
like hashing a squashfs rootfs.

So add rsa_verify_hash() to allow verifiying a signature against
an existing hash. As this entails the same verification routines
we can just move the relevant code over from rsa_verify() and also
call rsa_verify_hash() from there.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2020-07-08 17:21:46 -04:00
Simon Glass bdded2015c cmd: Add a memory-search command
It is useful to be able to find hex values and strings in a memory range.
Add a command to support this.

cmd: Fix 'md' and add a memory-search command
At present 'md.q' is broken. This series provides a fix for this. It also
implements a new memory-search command called 'ms'. It allows searching
memory for hex and string data.
END

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass a33a824227 command: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is
included by env.h in this file, but that might not last forever.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass 677dbf5dae display_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA

Fixes: 0914011310 ("command: Remove the cmd_tbl_t typedef")
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Simon Glass 4680976fb6 cmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Simon Glass 76be8f75c5 cmd: mem: Use a macro to avoid #ifdef in help
It is a bit painful to have #ifdefs in the middle of the help for each
command. Add a macro to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Simon Glass 3428faf23a Update MEM_SUPPORT_64BIT_DATA to be always defined
Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.

Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-07-08 17:21:46 -04:00
Dario Binacchi 84dd190244 spl: fit: improve spl_nand_fit_read(...) readability
Replacing the ret variable with err and handling first the error
condition about the value returned by the spl_nand_fit_read routine,
improves the code readability.
Furthermore, the 'else' int the 'else return ret' instruction was
useless.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-07-08 17:21:46 -04:00
Dario Binacchi 9f6a14c47f spl: fit: nand: fix fit loading in case of bad blocks
The offset at which the image to be loaded from NAND is located is
retrieved from the itb header. The presence of bad blocks in the area
of the NAND where the itb image is located could invalidate the offset
which must therefore be adjusted taking into account the state of the
sectors concerned.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2020-07-08 17:21:46 -04:00
Dario Binacchi 585b468a8c spl: fit: fail fit loading in case of FDT appending error
If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Dario Binacchi 146a17ad64 spl: fix format of function documentation
U-Boot adopted the kernel-doc annotation style.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner c076faba14 spl: fit: select SPL_CRYPTO_SUPPORT for SPL_FIT_SIGNATURE
Verifying FIT images obviously needs the rsa parts of crypto
support and while main uboot always compiles crypto support,
it's optional for SPL and we should thus select the necessary
option to not end up in compile errors like:

    u-boot/lib/rsa/rsa-verify.c:328: undefined reference to `rsa_mod_exp'

So select SPL_CRYPTO_SUPPORT in SPL_FIT_SIGNATURE.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 051cc09ea1 spl: fit: select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE
rsa-checsum needs support for hash functions or else will run into
compile errors like:
u-boot/lib/rsa/rsa-checksum.c:28: undefined reference to `hash_progressive_lookup_algo'

So similar to the main FIT_SIGNATURE entry selects HASH,
select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 1a62c23ecf lib: rsa: add documentation to padding_pss_verify to document limitations
padding_pss_verify only works with the default pss salt setting of -2
(length to be automatically determined based on the PSS block structure)
not -1 (salt length set to the maximum permissible value), which makes
verifications of signatures with that saltlen fail.

Until this gets implemented at least document this behaviour.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner eda753be8a lib: rsa: free local arrays after use in rsa_gen_key_prop()
n, rr and rrtmp are used for internal calculations, but in the end
the results are copied into separately allocated elements of the
actual key_prop, so the n, rr and rrtmp elements are not used anymore
when returning from the function and should of course be freed.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 49d0ea3746 lib: rsa: fix allocated size for rr and rrtmp in rsa_gen_key_prop()
When calculating rrtmp/rr rsa_gen_key_prop() tries to make
(((rlen + 31) >> 5) + 1) steps in the rr uint32_t array and
(((rlen + 7) >> 3) + 1) / 4 steps in uint32_t rrtmp[]
with rlen being num_bits * 2

On a 4096bit key this comes down to to 257 uint32_t elements
in rr and 256 elements in rrtmp but with the current allocation
rr and rrtmp only have 129 uint32_t elements.

On 2048bit keys this works by chance as the defined max_rsa_size=4096
allocates a suitable number of elements, but with an actual 4096bit key
this results in other memory parts getting overwritten.

So as suggested by Heinrich Schuchardt just use the actual bit-size
of the key as base for the size calculation, in turn making the code
compatible to any future keysizes.

Suggested-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

rrtmp needs 2 + (((*prop)->num_bits * 2) >> 5) array elements.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 8434b43730 lib: rsa: bring exp_len in line when generating a key_prop
The exponent field of struct key_prop gets allocated an uint64_t,
and the contents are positioned from the back, so an exponent of
"0x01 0x00 0x01" becomes 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x1"

Right now rsa_gen_key_prop() allocates a uint64_t but sets exp_len
to the size returned from the parser, while on the other hand the
when getting the key from the devicetree exp_len always gets set to
sizeof(uint64_t).

So bring that in line with the established code.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 447b1d7580 lib: rsa: take spl/non-spl into account when building rsa_verify_with_pkey()
Right now in multiple places there are only checks for the full
CONFIG_RSA_VERIFY_WITH_PKEY option, not split into main,spl,tpl variants.

This breaks when the rsa functions get enabled for SPL, for example to
verify u-boot proper from spl.

So fix this by using the existing helpers to distinguis between
build-steps.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 3075eb70c9 lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY
While the SPL may want to do signature checking this won't be
the case for TPL in all cases, as TPL is mostly used when the
amount of initial memory is not enough for a full SPL.

So on a system where SPL uses DM but TPL does not we currently
end up with a TPL compile error of:

    lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type ‘struct checksum_algo’

To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish
between both. If someone really needs FIT signature checking in
TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 17:21:46 -04:00
Heiko Stuebner 85ecfd1a12 cmd: add a panic command
Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.

So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-08 17:21:46 -04:00
Stefan Roese ce6515ecee debug_uart: Add CR before and after announce string
Add linefeeds before and after the announce string. This makes the
output easier to read, especially if some text follows the announce
message without a specific additional CR.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-08 17:21:46 -04:00
Johannes Holland bedbb383e1 tpm: add #ifndef to fix redeclaration build errors
tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both
define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to
prevent redeclaration errors.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
2020-07-08 17:21:46 -04:00
Dhananjay Phadke 06bea49809 tpm: add TPM2_GetRandom command support
Add support for TPM2 GetRandom command

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-08 15:38:32 -04:00
Bruno Thomsen 78cc3fcf08 tpm2: tis_spi: add linux compatible fallback string
This solves a compatibility issue with Linux device trees
that contain TPMv2.x hardware. So it's easier to import DTS
from upstream kernel when migrating board init from C code
to DTS.

The issue is that fallback binding is different between Linux
and u-Boot.

Linux: "tcg,tpm_tis-spi"
U-Boot: "tis,tpm2-spi"

As there are currently no in-tree users of the U-Boot binding,
it makes sense to use Linux fallback binding.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-07-08 15:38:32 -04:00
Tom Rini 186529953f - Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl8FyysACgkQd9zb2sjI
 SdFuBBAAqLO0rijSpibZYIER77wdV4oXl0w6D2gZ1iyfx0VFvcRSJ2dUQctruUO7
 5NqkAeVMabNIPwR/VoS6/QWmiBGmC/Yo5QAhGZs232Er5KzDPY75rVGwjkrTZrsc
 PrqWFz4cq/3KqlEZuZtamw0ArMcQ9+nHIwLVIqsTCs3Jz7X/UieClf0PuDGJtvtn
 Vs25GfxY6sldXpJ/5hLPaQsowKlbUfXyi/f/TfY9tDcHMv84jjU1d57G4NPp6TY4
 nqzkKumTKlpu4MykdthsxwkkDIRHCmatt03qUnUd0ell1qgYZQYT5+GhiXuvIxBy
 SgXeuiLlNa8Zrx5LvLcThtQ0B4Iw9CM/wTsLXQAZhBqbx7hc5en94bF1xWjtQVGO
 lPkHmKgB85uVCHUPTEqUTC6ltWT41Yi/N3by3+F2Dk+f8pOSB7H3Af/KMKf/KnRz
 QtakqPdGYHp8X/F5m8fA+GPqVI2To9PZoM9l34IWP6YDuuvLicdVaAF5LtOvoTIW
 g6J9NG9H46/yUjzK+gxNlRY++hKhjLgDZjZpVMK4b5RO8kVWXUvLdwHHu5q+sfZM
 ypS4Tv1TRGkvSvMMai5/1L3odKtbLxoUhtJWSfpTe7qNlBdQ4/w9HhGs8EiVxkDq
 IM7y2DbMNOBk7nxatK0Hw8bbj8/uWiA+SuYoq2qDdxAFTL8Rgzo=
 =2GPw
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer
2020-07-08 10:40:32 -04:00
Heiko Schocher 7012865e96 gpio: fix test.py for gpio label lookup
commit 2bd261dd17 ("gpio: search for gpio label if gpio is not found through bank name")

disabled DM_GPIO_LOOKUP_LABEL which is needed
in sandbox defconfigs, as we have tests for this
functionality.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-07-08 08:49:34 -04:00
Neil Armstrong d9c967792b ARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset
The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Christian Hewitt 8888d83773 boards: amlogic: add Odroid C4 support
Odroid C4 is an Amlogic SM1 device, the board config and board documentation
are adapted from the Odroid-N2 support from the same vendor.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: fix odroid-c4.rst typos and structure]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Christian Hewitt da77a787ff ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1
This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Pascal Vizeli 6de936b011 board: amlogic: Add Odroid-N2 board support
Add a proper Odroid-N2 board support to handle the Ethernet MAC
address stored in the in-SoC eFuses.

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2020-07-08 10:52:45 +02:00
Tom Rini 526fe06a5d Merge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- dts sync from kernel for rk3399 boards;
- Add Radxa Rock Pi N8, N10;
- Some feature update for Pinebook Pro;
2020-07-07 23:05:57 -04:00
Tom Rini 0b59138690 Merge branch '2020-07-07-misc-new-features'
- Improve s700 SoC support
- Fix building with clang on ARM.
- Juno platform updates
- fs/dm cmd improvements
- Other assorted improvements / fixes
2020-07-07 22:58:18 -04:00
Andre Przywara 9b9f10e3cc arm: juno: Enable SATA controller
The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.

Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.

Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara eb6211171d arm: juno: Enable PCI
The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.

Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.

Make some functions in the Juno PCIe init code static on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara 44a4042b01 sata_sil: Enable DM_PCI operation
Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara cc696e7cae arm: juno: Enable DM_ETH
The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara 117a52e238 net: smc911x: Properly handle EEPROM MAC address
When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara f1dd05bc34 net: dm: Remove warning about EEPROM provided MAC address
Similar to patch 821fec0ceb ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.

If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Andre Przywara 220b590d5f arm: vexpress64: Fix counter frequency
The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt 22a4e006be arm: use correct argument size of special registers
Compiling with clang on ARMv8 shows errors like:

./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
                asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
                                             ^~
                                             %w0

These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.

Mask off reserved bits when reading the exception level.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt b87d8d6a0e arm: remove outdated comment concerning -ffixed-x18
Clang 9 supports -ffixed-x18.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt 7f642cb287 trace: clang compatible handling of gd register
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

Use function set_gd() for setting the register on ARM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00
Heinrich Schuchardt a20f0c820f fs: fat_write: fix short name creation.
Truncate file names if the buffer size is exceeded to avoid a buffer
overflow.

Use Sphinx style function description.

Add a TODO comment.

Reported-by: CID 303779
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-07 18:23:48 -04:00