* tag 'v5.4.70': (3051 commits)
Linux 5.4.70
netfilter: ctnetlink: add a range check for l3/l4 protonum
ep_create_wakeup_source(): dentry name can change under you...
...
Conflicts:
arch/arm/mach-imx/pm-imx6.c
arch/arm64/boot/dts/freescale/imx8mm-evk.dts
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
drivers/crypto/caam/caamalg.c
drivers/gpu/drm/imx/dw_hdmi-imx.c
drivers/gpu/drm/imx/imx-ldb.c
drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
drivers/net/ethernet/freescale/enetc/enetc.c
drivers/net/ethernet/freescale/enetc/enetc_pf.c
drivers/thermal/imx_thermal.c
drivers/usb/cdns3/ep0.c
drivers/xen/swiotlb-xen.c
sound/soc/fsl/fsl_esai.c
sound/soc/fsl/fsl_sai.c
Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
When refresh i.MX7ULP wdog during resume, need to check if wdog is power
gate or NOT, as the command mode is different, if using incorrect refresh
command, it will trigger system reset immediately, so add CMD32 bit check
to make it work for both standby and mem mode suspend.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
i.MX7ULP's wdog1 is enabled by default when it is out of reset, the default timeout
value is 0x400 which is NOT safe enough to make sure NOT timeout before wdog driver
resume, so need to refresh wdog1 to buy more time for wdog driver resume which will
reconfigurate the wdog.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
On i.MX7ULP rev 2.2, the rev value is 3, so add support for this
revision, otherwise, it will use default revision of 1.0 which is
incorrect.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Current RBC counter value of 0x8(~240us) is NOT enough to block interrupt
when entering low power mode, when interrupt arrives during the window of
GIC dist disabled and low power mode enter NOT finished, system will stuck
at WFI and never wake up, increasing RBC counter can avoid this situation,
since the latency introduced by RBC counter is quite trivial, so here just
use the MAX value of 0x3f(~2ms) to make it safe enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
To be able to constat that busfreq is started/done vith
OPTEE OS, changed the mach-imx/busfreq_optee.c pr_debug
macro with printk(KERN_DEBUG ...)
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit 8e416ebaada127eeb408cf2e2ffc41202933eebb)
- Fix busfreq optee mode to not install the linux assembly function
used to synchronize all CPU in case of SMP mode
- Fix l2cache OPTEE/Linux share mutex operations
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
(cherry picked from commit 68f47bb3328e56c63d647f855fc654f4736658ce)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
- When OPTEE OS is present and if it support the busfreq
for the running the i.MX, the busfreq is executed in
the OPTEE OS by calling a specific SMC function
- Only a WFE function is copied into the OCRAM to
synchronize all Cores in multi-core devices
- OPTEE OS add a DT property 'busfreq=1' in the 'firmware/optee'
node to indicate the busfreq support
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
[ Upstream commit 4845446036fc9c13f43b54a65c9b757c14f5141b ]
if of_find_device_by_node() succeed, imx6q_suspend_init() doesn't have a
corresponding put_device(). Thus add a jump target to fix the exception
handling for this function implementation.
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 586745f1598ccf71b0a5a6df2222dee0a865954e ]
if of_find_device_by_node() succeed, imx_suspend_alloc_ocram() doesn't
have a corresponding put_device(). Thus add a jump target to fix the
exception handling for this function implementation.
Fixes: 1579c7b9fe ("ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.")
Signed-off-by: yu kuai <yukuai3@huawei.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit f1baca8896ae18e12c45552a4c4ae2086aa7e02c upstream.
512a928affd5 ("ARM: imx: build v7_cpu_resume() unconditionally")
introduced an unintended linker error for i.MX6 configurations that have
ARM_CPU_SUSPEND=n which can happen if neither CONFIG_PM, CONFIG_CPU_IDLE,
nor ARM_PSCI_FW are selected.
Fix this by having v7_cpu_resume() compiled only when cpu_resume() it
calls is available as well.
The C declaration for the function remains unguarded to avoid future code
inadvertently using a stub and introducing a regression to the bug the
original commit fixed.
Cc: <stable@vger.kernel.org>
Fixes: 512a928affd5 ("ARM: imx: build v7_cpu_resume() unconditionally")
Reported-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Tested-by: Roland Hieber <rhi@pengutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit c74067a0f776c1d695a713a4388c3b6a094ee40a upstream.
i.MX7D is supported for either the v7-A or the v7-M cores,
but the latter causes a warning:
WARNING: unmet direct dependencies detected for ARM_ERRATA_814220
Depends on [n]: CPU_V7 [=n]
Selected by [y]:
- SOC_IMX7D [=y] && ARCH_MXC [=y] && (ARCH_MULTI_V7 [=n] || ARM_SINGLE_ARMV7M [=y])
Make the select statement conditional.
Fixes: 4562fa4c86c9 ("ARM: imx: Enable ARM_ERRATA_814220 for i.MX6UL and i.MX7D")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Cc: Christian Eggers <ceggers@arri.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 4562fa4c86c92a2df635fe0697c9e06379738741 upstream.
ARM_ERRATA_814220 has below description:
The v7 ARM states that all cache and branch predictor maintenance
operations that do not specify an address execute, relative to
each other, in program order.
However, because of this erratum, an L2 set/way cache maintenance
operation can overtake an L1 set/way cache maintenance operation.
This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
r0p4, r0p5.
i.MX6UL and i.MX7D have Cortex-A7 r0p5 inside, need to enable
ARM_ERRATA_814220 for proper workaround.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Cc: Christian Eggers <ceggers@arri.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 512a928affd51c2dc631401e56ad5ee5d5dd68b6 upstream.
This function is not only needed by the platform suspend code, but is also
reused as the CPU resume function when the ARM cores can be powered down
completely in deep idle, which is the case on i.MX6SX and i.MX6UL(L).
Providing the static inline stub whenever CONFIG_SUSPEND is disabled means
that those platforms will hang on resume from cpuidle if suspend is disabled.
So there are two problems:
- The static inline stub masks the linker error
- The function is not available where needed
Fix both by just building the function unconditionally, when
CONFIG_SOC_IMX6 is enabled. The actual code is three instructions long,
so it's arguably ok to just leave it in for all i.MX6 kernel configurations.
Fixes: 05136f0897 ("ARM: imx: support arm power off in cpuidle for i.mx6sx")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
On i.MX6DL, AXI clock is from 540M PFD in normal mode, and from periph
clk in low bus mode, so need to make sure AXI clock parent switch
correctly in normal mode and low bus mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
On i.MX6QP, the soc_id exported to the /sys/devices/soc0/soc_id
should be 'i.MX6QP'.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <anson.huang@nxp.com>
i.MX6UL and i.MX7D have Cortex-A7 inside, need to enable ARM_ERRATA_814220
for proper workaround.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Add cpu type check for i.MX6ULZ in MSL code to support low
power feature.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
enet_clk_ref is the same clock as ptp for i.MX6qdl platform,
but dtsi only define ptp clock that source from soc internal
anatop clock, and imx6q clock driver already register "enet_ref"
clock lookup for the ptp clock, so keep the con_id string as
"enet_ref" for clk_get_sys().
This reverts commit a3990871b9.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
During system counter frequency change, the counter will stop, it
takes several mS even up to 20mS to finish the frequency change, if
system enters STOP mode before the frequency change done, system
counter will NOT run during STOP mode, then it will case system time
inaccurate and sometimes cause below RCU stall, so system can ONLY
enter STOP mode after the system counter frequency change done by
checking the ACK of frequency change.
rtc_testapp_6 0 TINFO : Waiting 50 seconds for alarm.......
fec 30be0000.ethernet eth0: Link is Down
PM: suspend devices took 0.670 seconds
Disabling non-boot CPUs ...
Enabling non-boot CPUs ...
rcu: INFO: rcu_sched self-detected stall on CPU
rcu: 0-...!: (1 ticks this GP) idle=1f6/1/0x40000002 softirq=5240/5240 fqs=0
(t=4903 jiffies g=3737 q=4)
rcu: rcu_sched kthread starved for 4903 jiffies! g3737 f0x0 RCU_GP_WAIT_FQS(5) ->state=0x402 ->0
rcu: RCU grace-period kthread stack dump:
rcu_sched I 0 10 2 0x00000000
[<c0d85a9c>] (__schedule) from [<c0d85e64>] (schedule+0x50/0xc4)
[<c0d85e64>] (schedule) from [<c0d8b8fc>] (schedule_timeout+0x1b8/0x37c)
[<c0d8b8fc>] (schedule_timeout) from [<c01b9f2c>] (rcu_gp_kthread+0x8cc/0x1678)
[<c01b9f2c>] (rcu_gp_kthread) from [<c015f12c>] (kthread+0x114/0x14c)
[<c015f12c>] (kthread) from [<c01010b4>] (ret_from_fork+0x14/0x20)
Exception stack(0xd80fdfb0 to 0xd80fdff8)
dfa0: 00000000 00000000 00000000 00000000
dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
dfe0: 00000000 00000000 00000000 00000000 00000013 00000000
NMI backtrace for cpu 0
CPU: 0 PID: 834 Comm: rtc_testapp_6 Not tainted 5.4.0-rc7-03214-g56a9ca3 #105
Hardware name: Freescale i.MX7 Dual (Device Tree)
[<c01126e4>] (unwind_backtrace) from [<c010cf3c>] (show_stack+0x10/0x14)
[<c010cf3c>] (show_stack) from [<c0d691dc>] (dump_stack+0xe4/0x118)
[<c0d691dc>] (dump_stack) from [<c0d70678>] (nmi_cpu_backtrace+0xac/0xbc)
[<c0d70678>] (nmi_cpu_backtrace) from [<c0d70768>] (nmi_trigger_cpumask_backtrace+0xe0/0x130)
[<c0d70768>] (nmi_trigger_cpumask_backtrace) from [<c01be188>] (rcu_dump_cpu_stacks+0x9c/0xd8)
[<c01be188>] (rcu_dump_cpu_stacks) from [<c01bd254>] (rcu_sched_clock_irq+0x940/0xbec)
[<c01bd254>] (rcu_sched_clock_irq) from [<c01c5758>] (update_process_times+0x2c/0x54)
[<c01c5758>] (update_process_times) from [<c01d9cf0>] (tick_sched_timer+0x5c/0xc0)
[<c01d9cf0>] (tick_sched_timer) from [<c01c6bf8>] (__hrtimer_run_queues+0x140/0x548)
[<c01c6bf8>] (__hrtimer_run_queues) from [<c01c792c>] (hrtimer_interrupt+0x134/0x2bc)
[<c01c792c>] (hrtimer_interrupt) from [<c097eb00>] (arch_timer_handler_phys+0x2c/0x34)
[<c097eb00>] (arch_timer_handler_phys) from [<c01a6b1c>] (handle_percpu_devid_irq+0xd4/0x384)
[<c01a6b1c>] (handle_percpu_devid_irq) from [<c01a072c>] (generic_handle_irq+0x20/0x34)
[<c01a072c>] (generic_handle_irq) from [<c01a0d34>] (__handle_domain_irq+0x64/0xe0)
[<c01a0d34>] (__handle_domain_irq) from [<c0548510>] (gic_handle_irq+0x4c/0xa0)
[<c0548510>] (gic_handle_irq) from [<c0101a70>] (__irq_svc+0x70/0x98)
Exception stack(0xd8cedd00 to 0xd8cedd48)
dd00: 00000001 d88a5d20 00000000 200a0013 00000000 00000000 c1b3f6f0 0000002a
dd20: d8cec000 00000000 c1b3dbf8 c1b3d6f8 c16c82bc d8cedd50 c018fe50 c019dd68
dd40: 200a0013 ffffffff
[<c0101a70>] (__irq_svc) from [<c019dd68>] (console_unlock+0x4e0/0x634)
[<c019dd68>] (console_unlock) from [<c019f6c8>] (vprintk_emit+0xf4/0x2d0)
[<c019f6c8>] (vprintk_emit) from [<c019f8c8>] (vprintk_default+0x24/0x2c)
[<c019f8c8>] (vprintk_default) from [<c019fe9c>] (printk+0x2c/0x54)
[<c019fe9c>] (printk) from [<c013b560>] (enable_nonboot_cpus+0x38/0x2cc)
[<c013b560>] (enable_nonboot_cpus) from [<c019b4d0>] (suspend_devices_and_enter+0x374/0xa44)
[<c019b4d0>] (suspend_devices_and_enter) from [<c019be8c>] (pm_suspend+0x2ec/0x3d0)
[<c019be8c>] (pm_suspend) from [<c019a088>] (state_store+0x68/0xc8)
[<c019a088>] (state_store) from [<c033305c>] (kernfs_fop_write+0xfc/0x1e0)
[<c033305c>] (kernfs_fop_write) from [<c029d278>] (__vfs_write+0x2c/0x1d0)
[<c029d278>] (__vfs_write) from [<c02a0184>] (vfs_write+0xa0/0x180)
[<c02a0184>] (vfs_write) from [<c02a03e0>] (ksys_write+0x5c/0xd8)
[<c02a03e0>] (ksys_write) from [<c0101000>] (ret_fast_syscall+0x0/0x28)
Exception stack(0xd8cedfa8 to 0xd8cedff0)
dfa0: 00036294 00021590 00000004 bef5cd29 00000007 00000000
dfc0: 00036294 00021590 b6fc0d20 00000004 00000000 00000000 b6fc2fa4 00000000
dfe0: 00000004 bef5c8e8 b6f35d4f b6ec1d16
CPU1 is up
imx6q-pcie 33800000.pcie: Phy link never came up
imx6q-pcie 33800000.pcie: pcie link is down after resume.
mmc1: queuing unknown CIS tuple 0x80 (2 bytes)
mmc1: queuing unknown CIS tuple 0x80 (7 bytes)
mmc1: queuing unknown CIS tuple 0x80 (6 bytes)
PM: resume devices took 0.220 seconds
OOM killer enabled.
Restarting tasks ... done.
PM: suspend exit
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
The GPC power domain driver add GENPD_FLAG_RPM_ALWAYS_ON to
the i.MX6QP's PU power domain flag, that means it is always ON
for runtime PM but can be OFF during suspend, so no need to
explicitly power ON/OFF PU power for i.MX6QP during suspend/resume
to avoid below dump:
Unable to handle kernel NULL pointer dereference at virtual address 00000044
pgd = 20824a30
[00000044] *pgd=4e36d831
Internal error: Oops: 17 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 732 Comm: sh Tainted: G W 5.3.0-rc3-next-20190809-01770-g0a0b3ec-dir3
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
PC is at regmap_update_bits_base+0x10/0x74
LR is at imx6_pm_domain_power_on+0xbc/0x1b4
pc : [<c070887c>] lr : [<c05e18e4>] psr: 600001d3
sp : e9339d68 ip : e9338000 fp : c1a24158
r10: c1308b08 r9 : 00000260 r8 : c1308b08
r7 : c1426120 r6 : c1426120 r5 : c1373580 r4 : 00000000
r3 : 00000001 r2 : 00000001 r1 : 00000260 r0 : 00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 3949404a DAC: 00000051
Process sh (pid: 732, stack limit = 0x8ba716d6)
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Init ENET RGMII tx clock source, set GPR5[9] to select clock from
internal PLL_enet. And set phy VDDIO to 1.8V that get better signal
quality.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: d7a171fcf5218166f558428610ca8e9cb9f7e830)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
The management data input/output (MDIO) bus where often high-speed,
open-drain operation is required. i.MX7D TO1.0 ENET MDIO pin has no
open drain as IC ticket number: TKT252980, i.MX7D TO1.1 fix the issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit: a747abd5f01d278b91d1b6ee6628e1935cb7b23c)
Conflicts:
arch/arm/mach-imx/mach-imx7d.c
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Enet get MAC address order:
From module parameters or kernel command line -> device tree ->
pfuse -> mac registers set by bootloader -> random mac address.
When there have no "fec.macaddr" parameters set in kernel command
line, enet driver get MAC address from device tree. And then if
the MAC address set in device tree and is valid, enet driver get
MAC address from device tree. Otherwise,enet get MAarch/arm/mach-imx
/mach-imx6q.c address from
pfuse. So, in the condition, update the MAC address (read from pfuse)
to device tree.
Cherry-pick & Merge patches from:
149ac988a25b8d8eb86d05679cbb7b42819ff7a1 &
3269e5c06bdb2f7ab9bd5afa9bbfe46d872197d3
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Add i.MX7ULP suspend/resume support, including standby mode
and mem mode, mapped to VLPS and VLLS mode.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Because that the mailbox MU driver is used in i.MX RPMSG implementation.
There is a confliction between this MU driver and the mailbox MU driver.
To back-compaible with LPM of iMX6SX, iMX7D and iMX7ULP.
Rename the compatible node of this MU driver.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
