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MLK-24821 ARM: imx: Increase RBC counter to for successful LPM mode enter on i.MX7D

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Current RBC counter value of 0x8(~240us) is NOT enough to block interrupt
when entering low power mode, when interrupt arrives during the window of
GIC dist disabled and low power mode enter NOT finished, system will stuck
at WFI and never wake up, increasing RBC counter can avoid this situation,
since the latency introduced by RBC counter is quite trivial, so here just
use the MAX value of 0x3f(~2ms) to make it safe enough.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
This commit is contained in:
Anson Huang 2020-09-21 08:57:44 +08:00
parent 5a50ac86e8
commit 41fae930ef
3 changed files with 8 additions and 10 deletions
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4
arch/arm/mach-imx/cpuidle-imx7d.c
View File

@ -258,8 +258,8 @@ static struct cpuidle_driver imx7d_cpuidle_driver = {
},
/* LOW POWER IDLE */
{
.exit_latency = 10000,
.target_residency = 20000,
.exit_latency = 12000,
.target_residency = 22000,
.flags = CPUIDLE_FLAG_TIMER_STOP,
.enter = imx7d_enter_low_power_idle,
.name = "LOW-POWER-IDLE",

7
arch/arm/mach-imx/imx7d_low_power_idle.S
View File

@ -641,13 +641,12 @@ ENTRY(imx7d_low_power_idle)
/*
* enable the RBC bypass counter here
* to hold off the interrupts. RBC counter
* = 8 (240us). With this setting, the latency
* = 8 (2ms). With this setting, the latency
* from wakeup interrupt to ARM power up
* is ~250uS.
* is ~2ms.
*/
ldr r8, [r10, #0x14]
bic r8, r8, #(0x3f << 24)
orr r8, r8, #(0x8 << 24)
orr r8, r8, #(0x3f << 24)
str r8, [r10, #0x14]
/* enable the counter. */

7
arch/arm/mach-imx/suspend-imx7.S
View File

@ -602,13 +602,12 @@ ddr_retention_enter_out:
/*
* enable the RBC bypass counter here
* to hold off the interrupts. RBC counter
* = 8 (240us). With this setting, the latency
* = 0x3f (2ms). With this setting, the latency
* from wakeup interrupt to ARM power up
* is ~250uS.
* is ~2ms.
*/
ldr r8, [r11, #0x14]
bic r8, r8, #(0x3f << 24)
orr r8, r8, #(0x8 << 24)
orr r8, r8, #(0x3f << 24)
str r8, [r11, #0x14]
/* enable the counter. */