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MLK-25334-1 dt-bindings: imx6q-pcie: add one property to disable l1ss support or not 

HW board design may not support the L1.1 ASPM, although the L1.1 ASPM
can be supported by the SOC chip.
So, export one property to disable L1.1 ASPM supported or not.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
(cherry picked from commit 7bd2d56b72d33e223305aa2ef9046c0e38f225e6)
(cherry picked from commit 439d54d4021a0cc2a297472fde38de98b687e16a)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
This commit is contained in:
Richard Zhu 2021-03-09 15:13:13 +08:00 committed by Andrey Zhizhikin
parent af86e332d5
commit 58b5e9c227
1 changed files with 3 additions and 0 deletions
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Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
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@ -60,6 +60,9 @@ Optional properties:
- interrupt-names: Optional include the following entries:
- "dma": The interrupt that is asserted when an DMA interrupter
is received
- l1ss-disabled: Force to disable L1SS or not. If present then the L1
substate would be force disabled although it might be supported by the
chip.
Additional required properties for imx6sx-pcie:
- clock names: Must include the following additional entries: