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MLK-25333-3 clk: imx8mq: correct one pcie1 ctrl clock sel 

Correct one of the imx8mq_pcie1_ctrl_sels, from "sys2_pll_250m"
to "sys2_pll_333m".

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 6c34e907db3da694a63dbd44668189f769e686fe)
(cherry picked from commit 6c2415175e7bc5cfa8c5e197854b2915c8850c9c)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
This commit is contained in:
Richard Zhu 2021-03-09 14:49:32 +08:00 committed by Andrey Zhizhikin
parent 3eff23ff4c
commit af86e332d5
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/imx/clk-imx8mq.c
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@ -118,7 +118,7 @@ static const char * const imx8mq_disp_dtrc_sels[] = {"osc_25m", "vpu_pll_out", "
static const char * const imx8mq_disp_dc8000_sels[] = {"osc_25m", "vpu_pll_out", "sys1_pll_800m", "sys2_pll_1000m", "sys1_pll_160m", "sys2_pll_100m", "sys3_pll_out", "audio_pll2_out", };
static const char * const imx8mq_pcie1_ctrl_sels[] = {"osc_25m", "sys2_pll_250m", "sys2_pll_200m", "sys1_pll_266m",
"sys1_pll_800m", "sys2_pll_500m", "sys2_pll_250m", "sys3_pll_out", };
"sys1_pll_800m", "sys2_pll_500m", "sys2_pll_333m", "sys3_pll_out", };
static const char * const imx8mq_pcie1_phy_sels[] = {"osc_25m", "sys2_pll_100m", "sys2_pll_500m", "clk_ext1", "clk_ext2",
"clk_ext3", "clk_ext4", };