u-boot-brain/arch/arm/mach-uniphier/ph1-pro4
Masahiro Yamada fcbcd59730 ARM: uniphier: fix glitch signal problem for low-level debug
Currently, IECTRL is enabled after pin-mux settings for the low-level
debugging for PH1-LD4 and PH1-sLD8.  While IECTRL is disabled, input
signals are pulled-down, i.e. glitch signal (Low to High transition)
problem occurs if pin-mux is set up first.  As a result, one invalid
character is input to the UART block and the auto-boot counting is
terminated immediately.

The correct initialization procedure is:
 [1] Enable IECTRL (if IECTRL exists for the pins)
 [2] Set up pin-muxing
 [3] Deassert the reset of the hardware block

Currently, the low-level debugging is working for PH1-sLD3 and
PH1-Pro4, but just in case, follow the sequence for all the SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-09-25 00:27:53 +09:00
..
boot-mode.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00
clkrst_init.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00
ddrphy_init.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00
early_clkrst_init.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00
lowlevel_debug.S ARM: uniphier: fix glitch signal problem for low-level debug 2015-09-25 00:27:53 +09:00
Makefile ARM: uniphier: drop DCC micro support card support 2015-09-25 00:27:52 +09:00
pinctrl.c ARM: uniphier: remove ifdef CONFIG_{SOC} conditionals from sg-regs.h 2015-09-25 00:27:53 +09:00
pll_init.c ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_* 2015-09-25 00:27:53 +09:00
pll_spectrum.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00
sbc_init.c ARM: uniphier: change the external bus address mapping 2015-09-25 00:27:53 +09:00
umc_init.c ARM: UniPhier: replace <asm/io.h> with <linux/io.h> 2015-05-31 02:53:56 +09:00