u-boot-brain/arch
Mats Kärrman fac150e83f powerpc/lib: fix unsafe register handling in wait_ticks
If watchdog is enabled, the arch/powerpc/lib/ticks.S::wait_ticks() function
calls the function specified by the WATCHDOG_RESET macro.
The wait_ticks function depends on the registers r0, r6 and r7 being
preserved however that is not guaranteed, e.g. if the reset function is a
C function this will probably overwrite r0 and cause an endless loop.

The following patch changes to using r14+r15 instead of r6+r7 (to resemble
what would have been generated by a C compiler) and saves all necessary
registers on the stack.

The patch has been tested on a custom MPC5125 based machine using the 512x
powerpc architecture.

Signed-off-by: Mats Karrman <mats.karrman@tritech.se>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Tested-by: Stefan Roese <sr@denx.de>
2013-04-10 10:31:02 -04:00
..
arm Consolidate bool type 2013-04-01 16:33:52 -04:00
avr32 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
blackfin Consolidate bool type 2013-04-01 16:33:52 -04:00
m68k Consolidate bool type 2013-04-01 16:33:52 -04:00
microblaze Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
mips Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
nds32 Consolidate bool type 2013-04-01 16:33:52 -04:00
nios2 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
openrisc Introduce generic link section.h symbol files 2013-03-15 16:13:58 -04:00
powerpc powerpc/lib: fix unsafe register handling in wait_ticks 2013-04-10 10:31:02 -04:00
sandbox Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
sh Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-03-18 14:37:18 -04:00
sparc sparc: Fix build warnings in serial.c 2013-03-15 16:14:02 -04:00
x86 x86: Move PCI init before SPI init 2013-03-19 08:45:37 -07:00
.gitignore update include/asm/ gitignore after move 2010-05-07 00:17:30 +02:00