u-boot-brain/arch/x86
Bin Meng 5fb0151697 x86: baytrail: Support multiple microcode copies
Intel FSP has the capability to walk through the microcode blocks
which are passed as the TempRamInit() parameter from U-Boot and
finds the most appropriate microcode which is suitable for the cpu
on which it is running. Now we've seen several steppings for Intel
BayTrail series processors, adding those microcodes to the Intel
BayleyBay and MinnowMax board device tree files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-26 07:54:09 -07:00
..
cpu x86: coreboot: Allow >=4GiB memory bank size 2015-08-26 07:54:07 -07:00
dts x86: baytrail: Support multiple microcode copies 2015-08-26 07:54:09 -07:00
include/asm x86: Remove calculate_relocation_address() 2015-08-26 07:54:07 -07:00
lib x86: Remove calculate_relocation_address() 2015-08-26 07:54:07 -07:00
config.mk efi: Add 64-bit payload support 2015-08-05 08:44:07 -06:00
Kconfig x86: kconfig: Hide "System tables" for coreboot 2015-08-26 07:54:08 -07:00
Makefile x86: Add support for U-Boot as an EFI application 2015-08-05 08:44:06 -06:00