x86: baytrail: Support multiple microcode copies

Intel FSP has the capability to walk through the microcode blocks
which are passed as the TempRamInit() parameter from U-Boot and
finds the most appropriate microcode which is suitable for the cpu
on which it is running. Now we've seen several steppings for Intel
BayTrail series processors, adding those microcodes to the Intel
BayleyBay and MinnowMax board device tree files.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng 2015-08-15 14:37:50 -06:00 committed by Simon Glass
parent 5c113ff79c
commit 5fb0151697
2 changed files with 9 additions and 0 deletions

View File

@ -230,6 +230,12 @@
update@0 {
#include "microcode/m0230671117.dtsi"
};
update@1 {
#include "microcode/m0130673322.dtsi"
};
update@2 {
#include "microcode/m0130679901.dtsi"
};
};
};

View File

@ -256,6 +256,9 @@
update@0 {
#include "microcode/m0130673322.dtsi"
};
update@1 {
#include "microcode/m0130679901.dtsi"
};
};
};