mirror of
https://github.com/brain-hackers/u-boot-brain
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2a5d5d27ed
Some of t1042 boards fails DDR init with an Automatic calibration error every now and then. Investigations revealed that true Warm boots never failed. Warm boots has some extra steps performed, one being to start DDRC in Self Refresh and then clearing SR right after. Applying this SR method unconditionally made all our boards stable again, regardless of Cold/Warm boot. Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> |
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| .. | ||
| arm_ddr_gen3.c | ||
| ctrl_regs.c | ||
| ddr1_dimm_params.c | ||
| ddr2_dimm_params.c | ||
| ddr3_dimm_params.c | ||
| ddr4_dimm_params.c | ||
| fsl_ddr_gen4.c | ||
| fsl_mmdc.c | ||
| interactive.c | ||
| Kconfig | ||
| lc_common_dimm_params.c | ||
| main.c | ||
| Makefile | ||
| mpc85xx_ddr_gen1.c | ||
| mpc85xx_ddr_gen2.c | ||
| mpc85xx_ddr_gen3.c | ||
| mpc86xx_ddr.c | ||
| options.c | ||
| util.c | ||