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https://github.com/brain-hackers/u-boot-brain
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ef00227551
This gives boards flexibility to assign other than default addresses to each DDR controller. For example, DDR controler 2 can have 0 as the base and DDR controller 1 has higher memory. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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cpu | ||
include/asm | ||
lib | ||
config.mk |