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https://github.com/brain-hackers/u-boot-brain
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e626d2d446
The RESET pin needs to be kept low for at least 200 us according to the DDR3 spec. So just do it the right way. This issue did not cause any visible major problems earlier, because the DRAM RESET pin is usually already low after the board reset. And the time gap before reaching the sunxi u-boot DRAM initialization code appeared to be sufficient. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com> |
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| arm | ||
| avr32 | ||
| blackfin | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| openrisc | ||
| powerpc | ||
| sandbox | ||
| sh | ||
| sparc | ||
| x86 | ||
| .gitignore | ||
| Kconfig | ||