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https://github.com/brain-hackers/u-boot-brain
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b528b9377d
The LS1046A processor is built on the QorIQ LS series architecture combining four ARM A72 processor cores with DPAA 1.0 support. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
40 lines
823 B
Makefile
40 lines
823 B
Makefile
#
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# Copyright 2014-2015, Freescale Semiconductor
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += cpu.o
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obj-y += lowlevel.o
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obj-y += soc.o
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obj-$(CONFIG_MP) += mp.o
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obj-$(CONFIG_OF_LIBFDT) += fdt.o
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obj-$(CONFIG_SPL) += spl.o
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obj-$(CONFIG_FSL_LS_PPA) += ppa.o
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ifneq ($(CONFIG_FSL_LSCH3),)
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obj-y += fsl_lsch3_speed.o
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obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch3_serdes.o
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else
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ifneq ($(CONFIG_FSL_LSCH2),)
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obj-y += fsl_lsch2_speed.o
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obj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o
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endif
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endif
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ifneq ($(CONFIG_LS2080A),)
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obj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o
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endif
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ifneq ($(CONFIG_LS1043A),)
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obj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o
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endif
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ifneq ($(CONFIG_LS1012A),)
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obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o
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endif
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ifneq ($(CONFIG_LS1046A),)
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obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o
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endif
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