Sean Anderson 85768134b4 riscv: Ensure gp is NULL or points to valid data ... This ensures constructs like `if (gd & gd->...) { ... }` work when accessing the global data pointer. Without this change, it was possible for a very early trap to cause _exit_trap to directly or indirectly (through printf) to read arbitrary memory. This could cause a second trap, preventing show_regs from being printed. printf (and specifically puts) uses gd to determine what function to print with. These functions in turn use gd to find the serial device, etc. However, before accessing gd, puts first checks to see if it is non-NULL. This indicates an existing (perhaps undocumented) assumption that either gd is NULL or it is completely valid. Before this patch, gd either points to unexpected data (because it retains the value it did from the prior-stage) or points to uninitialized data (because it has not yet been initialized by board_init_f_init_reserve) until the hart has acquired available_harts_lock. This can cause two problems, depending on the value of gd->flags. If GD_FLG_SERIAL_READY is unset, then some garbage data will be printed to stdout, but there will not be a second trap. However, if GD_FLG_SERIAL_READY is set, then puts will try to print with serial_puts, which will likely cause a second trap. After this patch, gd is zero up until either a hart has set it in wait_for_gd_init, or until it is set by arch_init_gd. This prevents its usage before its data is initialized because both handle_trap and puts ensure that gd is nonzero before using it. After gd has been set, it is OK to access it because its data has been cleared (and so flags is valid). XIP cannot use locks because flash is not writable. This leaves it vulnerable to the same class of bugs regarding already-pending IPIs as before this series. Fixing that would require finding another method of synchronization, which is outside the scope of this series. Fixes: 7c6ca03eae ("riscv: additional crash information") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>		2020-09-30 08:54:52 +08:00
..
andes_plic.c	riscv: Clean up initialization in Andes PLIC	2020-09-30 08:54:46 +08:00
andes_plmt.c	riscv: Rework Andes PLMT as a UCLASS_TIMER driver	2020-09-30 08:54:45 +08:00
asm-offsets.c	riscv: Provide a mechanism to fix DT for reserved memory	2020-04-23 10:14:16 +08:00
boot.c	command: Remove the cmd_tbl_t typedef	2020-05-18 18:36:55 -04:00
bootm.c	common: Drop log.h from common header	2020-05-18 21:19:18 -04:00
cache.c	common: Move some cache and MMU functions out of common.h	2019-12-02 18:23:55 -05:00
crt0_riscv_efi.S	efi_loader: use predefined constants in crt0_*_efi.S	2019-07-16 22:17:14 +00:00
elf_riscv32_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
elf_riscv64_efi.lds	SPDX: Convert single license tags to Linux Kernel style	2018-05-29 14:44:21 +08:00
fdt_fixup.c	fdtdec: optionally add property no-map to created reserved memory node	2020-09-22 12:54:13 -06:00
image.c	common: Drop image.h from common header	2020-05-18 17:33:33 -04:00
interrupts.c	riscv: Ensure gp is NULL or points to valid data	2020-09-30 08:54:52 +08:00
Makefile	riscv: Rework riscv timer driver to only support S-mode	2020-09-30 08:54:45 +08:00
mkimage_fit_opensbi.sh	riscv: add a generic FIT generator script	2019-08-26 16:07:42 +08:00
reloc_riscv_efi.c	riscv: Remove unused _relocate arguments	2018-07-19 16:31:37 -04:00
reset.c	Revert "riscv: Allow use of reset drivers"	2020-07-24 14:55:31 +08:00
sbi_ipi.c	riscv: Clean up IPI initialization code	2020-07-01 15:01:22 +08:00
sbi.c	cmd: provide command sbi	2020-08-25 09:34:47 +08:00
setjmp.S	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	2018-11-26 13:57:29 +08:00
sifive_clint.c	riscv: Rework Sifive CLINT as UCLASS_TIMER driver	2020-09-30 08:54:46 +08:00
smp.c	riscv: Use a valid bit to ignore already-pending IPIs	2020-09-30 08:54:52 +08:00
spl.c	riscv: fix building with CONFIG_SPL_SMP=n	2020-08-25 09:33:45 +08:00