mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
e3aafef4cf
This adds platform code and the device tree for the Phytium Durian Board. The initial support comprises the UART and the PCIE. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2019
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* shuyiqi <shuyiqi@phytium.com.cn>
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* liuhao <liuhao@phytium.com.cn>
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*/
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#ifndef __DURIAN_CONFIG_H__
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#define __DURIAN_CONFIG_H__
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/* Sdram Bank #1 Address */
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_1_SIZE 0x7B000000
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000000)
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/* Size of Malloc Pool */
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#define CONFIG_ENV_SIZE 4096
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024 + CONFIG_ENV_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR (0x88000000 - 0x100000)
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/* PCI CONFIG */
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#define CONFIG_SYS_PCI_64BIT 1
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#define CONFIG_PCI_SCAN_SHOW
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/* SCSI */
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE 128
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SATA_MAX_DEVICE 4
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/* BOOT */
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#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"load_kernel=ext4load scsi 0:1 0x90100000 uImage-2004\0" \
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"load_fdt=ext4load scsi 0:1 0x95000000 ft2004-pci-64.dtb\0"\
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"boot_fdt=bootm 0x90100000 -:- 0x95000000\0" \
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"distro_bootcmd=run load_kernel; run load_fdt; run boot_fdt"
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#endif
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