mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 19:26:16 +09:00
0d331c035a
Add i.MX8QM MEK board support. Included a basic dts, enabled SPL FIT Boot log as below: U-Boot SPL 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) Normal Boot Trying to boot from MMC2_2 U-Boot 2019.01-rc1-00029-gf002213219 (Dec 24 2018 - 10:28:30 +0800) CPU: NXP i.MX8QM RevB A53 at 142933 MHz Model: Freescale i.MX8QM MEK Board: iMX8QM MEK Build: SCFW 9330215b Boot: SD1 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: Error: ethernet@5b040000 address not set. eth-1: ethernet@5b040000 Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
113 lines
941 B
Plaintext
113 lines
941 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 NXP
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*/
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&mu {
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u-boot,dm-spl;
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};
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&clk {
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u-boot,dm-spl;
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};
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&iomuxc {
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u-boot,dm-spl;
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};
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&pd_lsio {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio0 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio1 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio2 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio3 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio4 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio5 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio6 {
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u-boot,dm-spl;
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};
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&pd_lsio_gpio7 {
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u-boot,dm-spl;
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};
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&pd_conn {
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u-boot,dm-spl;
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};
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&pd_conn_sdch0 {
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u-boot,dm-spl;
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};
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&pd_conn_sdch1 {
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u-boot,dm-spl;
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};
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&pd_conn_sdch2 {
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u-boot,dm-spl;
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};
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&gpio0 {
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u-boot,dm-spl;
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};
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&gpio1 {
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u-boot,dm-spl;
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};
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&gpio2 {
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u-boot,dm-spl;
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};
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&gpio3 {
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u-boot,dm-spl;
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};
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&gpio4 {
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u-boot,dm-spl;
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};
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&gpio5 {
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u-boot,dm-spl;
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};
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&gpio6 {
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u-boot,dm-spl;
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};
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&gpio7 {
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u-boot,dm-spl;
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};
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&lpuart0 {
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u-boot,dm-spl;
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};
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&usdhc1 {
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u-boot,dm-spl;
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};
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&usdhc2 {
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u-boot,dm-spl;
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};
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