u-boot-brain/arch/arm/cpu/armv8/fsl-layerscape
Michael Walle dd6df64c68 armv8: layerscape: rework spin table
There are two issues:

 (1) The spin table doesn't convert the endianness of the jump address.
     Although there is code for it, the result isn't used at all (x0).
 (2) If something goes wrong, the function returns. But that doesn't
     make sense at all.

Use the actual converted jump address as destination to fix. If
there is an error, jump to a trap loop. And rearrange the code exception
level switching code to make it smaller and clearer.

This reduces the size of the spin table code section from 696 bytes to
424 bytes. If CONFIG_ARMV8_SWITCH_TO_EL1 the code size reduced from 696
bytes to 632 bytes.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27 14:16:28 +05:30
..
doc watchdog: move WATCHDOG_TIMEOUT_MSECS to Kconfig 2019-10-08 07:46:38 +02:00
cpu.c treewide: convert bd_t to struct bd_info by coccinelle 2020-07-17 09:30:13 -04:00
cpu.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
fdt.c armv8: layerscape: clean exported symbols in spintable.S 2020-07-27 14:16:28 +05:30
fsl_lsch2_serdes.c common: Drop linux/delay.h from common header 2020-05-18 21:19:23 -04:00
fsl_lsch2_speed.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
fsl_lsch3_serdes.c common: Drop linux/bitops.h from common header 2020-05-18 21:19:23 -04:00
fsl_lsch3_speed.c common: Move clock functions into a new file 2020-01-17 13:27:29 -05:00
icid.c armv8: fsl-layerscape: make icid setup endianness aware 2019-08-22 09:07:36 +05:30
Kconfig armv8: ls1028a: move FSL_LAYERSCAPE to kconfig 2020-07-27 14:16:26 +05:30
lowlevel.S armv8: layerscape: move spin table into own module 2020-07-27 14:16:27 +05:30
ls1012a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1028_ids.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
ls1028a_serdes.c armv8: ls1028a_serdes: Add few missing serdes protocols 2020-01-24 14:28:26 +05:30
ls1043_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1043a_psci.S SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1043a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls1046_ids.c armv8: fsl-layerscape: fix SEC QI ICID setup 2019-03-03 22:01:09 +05:30
ls1046a_serdes.c armv8: ls1046afrwy: Add support for LS1046AFRWY platform 2019-06-19 12:54:57 +05:30
ls1088_ids.c armv8: fsl-layerscape: guard caam specific defines 2019-11-08 11:13:38 +05:30
ls1088a_serdes.c armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port 2020-01-24 14:28:26 +05:30
ls2080a_serdes.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ls2088_ids.c armv8: ls2088a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160_ids.c armv8: lx2160a: add icid setup for platform devices 2019-11-08 11:13:38 +05:30
lx2160a_serdes.c armv8: lx2160a: Add LX2160A SoC Support 2018-12-06 14:37:19 -08:00
Makefile armv8: layerscape: move spin table into own module 2020-07-27 14:16:27 +05:30
mp.c armv8: layerscape: relocate spin table if EFI_LOADER is enabled 2020-07-27 14:16:28 +05:30
ppa.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
soc.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00
spintable.S armv8: layerscape: rework spin table 2020-07-27 14:16:28 +05:30
spl.c common: Drop log.h from common header 2020-05-18 21:19:18 -04:00