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https://github.com/brain-hackers/u-boot-brain
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3b82335015
On iMX7D SabreSD board, the QSPI has pins conflict with EPDC (default). To use QSPI, users have to rework the board (de-populate R388-R391, R396-R399 populate R392-R395, R299, R300). So we add new DTS file and new defconfig dedicated for QSPI. Other changes to support the DM QSPI: - Add QSPI node and alias spi0. - Modify spi4 (spi-gpio) node and add alias spi5 for it to avoid req conflict - Add EPDC node in imx7d.dtsi and disable it in imx7d-sdb-qspi.dts to align with kernel and also present the conflict. - Add -u-boot.dtsi to modify compatible string of mx25l51245g@0 to "spi-flash" - Remove iomux settings of qspi in board codes which is not needed for DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
45 lines
909 B
Plaintext
45 lines
909 B
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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* Copyright 2018 NXP
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*/
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#include "imx7d-sdb.dts"
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/* disable epdc, conflict with qspi */
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&epdc {
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status = "disabled";
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};
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&iomuxc {
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qspi1 {
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pinctrl_qspi1_1: qspi1grp_1 {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
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MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
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MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
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MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
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MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
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MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
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>;
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};
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};
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};
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&qspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi1_1>;
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status = "okay";
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ddrsmp=<0>;
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flash0: mx25l51245g@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "macronix,mx25l51245g";
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spi-max-frequency = <29000000>;
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/* take off one dummy cycle */
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spi-nor,ddr-quad-read-dummy = <5>;
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reg = <0>;
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};
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};
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